Stochastic Memory Devices for Security and Computing

With the widespread use of mobile computing and internet of things, secured communication and chip authentication have become extremely important. Hardware-based security concepts generally provide the best performance in terms of a good standard of security, low power consumption, and large-area density. In these concepts, the stochastic properties of nanoscale devices, such as the physical and geometrical variations of the process, are harnessed for true random number generators (TRNGs) and physical unclonable functions (PUFs). Emerging memory devices, such as resistive-switching memory (RRAM), phase-change memory (PCM), and spin-transfer torque magnetic memory (STT-MRAM), rely on a unique combination of physical mechanisms for transport and switching, thus appear to be an ideal source of entropy for TRNGs and PUFs. An overview of stochastic phenomena in memory devices and their use for developing security and computing primitives is provided. First, a broad classification of methods to generate true random numbers via the stochastic properties of nanoscale devices is presented. Then, practical implementations of stochastic TRNGs, such as hardware security and stochastic computing, are shown. Finally, future challenges to stochastic memory development are discussed

Material development of doped hafnium oxide for non-volatile ferroelectric memory application

Seit der Entdeckung von Ferroelektrizität in Hafniumoxid stellt es aufgrund seiner Prozesskompatibilität im Bereich der Mikroelektronik sowie seiner besonderen Eigenschaften ein wachsendes Forschungsfeld dar. Im Speziellen wird die Anwendung in nicht-flüchtigen Speichern, in neuromorphen Bauelementen sowie in piezo-/pyroelektrischen Sensoren untersucht. Jedoch ist das Verhalten von ferroelektrischem Hafniumoxid im Vergleich zu Ferroelektrika mit Perovskit-Struktur nicht im Detail verstanden. Zudem spielen Prozesseinflüsse während und nach der Abscheidung eine entscheidende Rolle für die Materialeigenschaften aufgrund der metastabilen Natur der ferroektrischen Phase in diesem Materialsystem. In dieser Arbeit werden die grundlegenden physikalischen Eigenschaften von Hafniumoxid, Prozesseinflüsse auf die Mikrostruktur und Zuverlässigkeitsaspekte von nicht-flüchtigen sowie neuromorphen Bauelementen untersucht. Im Bezug auf die physikalischen Eigenschaften zeigen sich hier deutliche Belege für ferroelastische 90° Domänenwandbewegungen in Hafniumoxid-basierten Dünnschichten, welche in einem ähnlichen Verhalten wie ein Antiferroelektrikum resultieren. Weiterhin wird über die Entdeckung von einer mittels elektrischem Feld induzierten Kristallisation in diesem Materialsystem berichtet. Für die Charakterisierung der Mikrostruktur wird als neue Methode Transmissions-Kikuchi-Diffraktion eingeführt, welche eine detaillierte Untersuchung der lokalen kristallographischen Phase, Orientierung und Gefügestruktur ermöglicht. Hierbei zeigen sich deutliche Vorzugsorientierungen in Abhängigkeit des Substrates, der Dotierstoffkonzentration sowie der Glühtemperatur. Auf Basis dieser Ergebnisse lassen sich die beobachteten Zuverlässigkeitsverhalten in Bauelementen erklären und mittels Defektkontrolle weiter optimieren. Schließlich wird das Verhalten in neuromorphen Bauelementen untersucht und Leitlinien für Prozess- und Bauelementoptimierung gegeben.:Abstract i Abstract ii List of Figures vi List of Tables x Acronyms xi Symbols xiv 1 Introduction 1 2 Theoretical background 3 2.1 Behavior of ferroelectric materials 3 2.1.1 Phase transitions at the Curie temperature 4 2.1.2 Domains, domain walls, and microstructure 5 2.2 Ferroelectricity in HfO2 6 2.2.1 Thermodynamics and kinetics 8 2.2.2 Antiferroelectric-like behavior, wake-up effect, and fatigue 11 2.2.3 Piezo- and pyroelectric effects 13 2.3 Ferroelectric FETs 13 2.3.1 Endurance, retention and variability 14 2.3.2 Neuromorphic devices 15 3 Methodology 17 3.1 Electrical analysis 17 3.1.1 Capacitors 17 3.1.2 FeFETs 19 3.2 Structural and chemical analysis 20 3.2.1 Grazing-incident X-ray diffraction (GIXRD) 20 3.2.2 Transmission electron microscopy (TEM) 20 3.2.3 Time-of-flight secondary ion mass spectrometry (ToF-SIMS) 21 3.3 Transmission Kikuchi diffraction 21 3.4 Sample preparation 23 4 The physics of ferroelectric HfO2 25 4.1 Ferroelastic switching 25 4.2 Electric field-induced crystallization 30 5 Microstructure engineering 33 5.1 Microstructure and ferroelectric domains in HfO2 33 5.2 Doping influences 34 5.2.1 Zr doping (similar ionic radius) 35 5.2.2 Si doping (smaller ionic radius) 43 5.2.3 La doping (larger ionic radius) 50 5.2.4 Co-doping 50 5.3 Annealing influences 53 5.4 Interlayer influences 58 5.5 Interface layer influences 62 5.5.1 Structural differences in the HfO2 layer 63 5.5.2 Interactions of the interface and HfO2 layer 67 5.5.3 Substrate-driven changes in the Si-doping profile 73 5.6 Phenomenological wake-up behaviors and process guidelines 77 6 HfO2-based ferroelectric FETs 81 6.1 Endurance, retention and variability 81 6.1.1 Analytic model of HfO2-based FeFETs 84 6.1.2 Endurance improvements by interface fluorination 94 6.2 Neuromorphic devices and circuits 98 6.2.1 Current peroclation paths in FeFETs 100 6.2.2 Material and stack influences on synaptic devices 105 6.2.3 Reliability aspects of synaptic devices 106 7 Conclusion and outlook 109 Appendix 142 Density-functional-theory calculations 142 Supplementary Figures 143 Publications 145 Acknowledgment 156 Declaration 158The discovery of ferroelectricity in hafnium oxide spurred a growing research field due to hafnium oxides compatibility with processes in microelectronics as well as its unique properties. Notably, its application in non-volatile memories, neuromorphic devices as well as piezo- and pyroelectric sensors is investigated. However, the behavior of ferroelectric hafnium oxide is not understood into depth compared to common perovskite structure ferroelectrics. Due the the metastable nature of the ferroelectric phase, process conditions have a strong influence during and after its deposition. In this work, the physical properties of hafnium oxide, process influences on the microstructure as well as reliability aspects in non-volatile and neuromorphic devices are investigated. With respect to the physical properties, strong evidence is provided that the antiferroelectric-like behavior in hafnium oxide based thin films is governed by ferroelastic 90° domain wall movement. Furthermore, the discovery of an electric field-induced crystallization process in this material system is reported. For the analysis of the microstructure, the novel method of transmission Kikuchi diffraction is introduced, allowing an investigation of the local crystallographic phase, orientation and grain structure. Here, strong crystallographic textures are observed in dependence of the substrate, doping concentration and annealing temperature. Based on these results, the observed reliability behavior in the electronic devices is explainable and engineering of the present defect landscape enables further optimization. Finally, the behavior in neuromorphic devices is explored as well as process and design guidelines for the desired behavior are provided.:Abstract i Abstract ii List of Figures vi List of Tables x Acronyms xi Symbols xiv 1 Introduction 1 2 Theoretical background 3 2.1 Behavior of ferroelectric materials 3 2.1.1 Phase transitions at the Curie temperature 4 2.1.2 Domains, domain walls, and microstructure 5 2.2 Ferroelectricity in HfO2 6 2.2.1 Thermodynamics and kinetics 8 2.2.2 Antiferroelectric-like behavior, wake-up effect, and fatigue 11 2.2.3 Piezo- and pyroelectric effects 13 2.3 Ferroelectric FETs 13 2.3.1 Endurance, retention and variability 14 2.3.2 Neuromorphic devices 15 3 Methodology 17 3.1 Electrical analysis 17 3.1.1 Capacitors 17 3.1.2 FeFETs 19 3.2 Structural and chemical analysis 20 3.2.1 Grazing-incident X-ray diffraction (GIXRD) 20 3.2.2 Transmission electron microscopy (TEM) 20 3.2.3 Time-of-flight secondary ion mass spectrometry (ToF-SIMS) 21 3.3 Transmission Kikuchi diffraction 21 3.4 Sample preparation 23 4 The physics of ferroelectric HfO2 25 4.1 Ferroelastic switching 25 4.2 Electric field-induced crystallization 30 5 Microstructure engineering 33 5.1 Microstructure and ferroelectric domains in HfO2 33 5.2 Doping influences 34 5.2.1 Zr doping (similar ionic radius) 35 5.2.2 Si doping (smaller ionic radius) 43 5.2.3 La doping (larger ionic radius) 50 5.2.4 Co-doping 50 5.3 Annealing influences 53 5.4 Interlayer influences 58 5.5 Interface layer influences 62 5.5.1 Structural differences in the HfO2 layer 63 5.5.2 Interactions of the interface and HfO2 layer 67 5.5.3 Substrate-driven changes in the Si-doping profile 73 5.6 Phenomenological wake-up behaviors and process guidelines 77 6 HfO2-based ferroelectric FETs 81 6.1 Endurance, retention and variability 81 6.1.1 Analytic model of HfO2-based FeFETs 84 6.1.2 Endurance improvements by interface fluorination 94 6.2 Neuromorphic devices and circuits 98 6.2.1 Current peroclation paths in FeFETs 100 6.2.2 Material and stack influences on synaptic devices 105 6.2.3 Reliability aspects of synaptic devices 106 7 Conclusion and outlook 109 Appendix 142 Density-functional-theory calculations 142 Supplementary Figures 143 Publications 145 Acknowledgment 156 Declaration 15

The Efficacy of Programming Energy Controlled Switching in Resistive Random Access Memory (RRAM)

Current state-of-the-art memory technologies such as FLASH, Static Random Access Memory (SRAM) and Dynamic RAM (DRAM) are based on charge storage. The semiconductor industry has relied on cell miniaturization to increase the performance and density of memory technology, while simultaneously decreasing the cost per bit. However, this approach is not sustainable because the charge-storage mechanism is reaching a fundamental scaling limit. Although stack engineering and 3D integration solutions can delay this limit, alternate strategies based on non-charge storage mechanisms for memory have been introduced and are being actively pursued. Resistive Random Access Memory (RRAM) has emerged as one of the leading candidates for future high density non-volatile memory. The superior scalability of RRAMs is based on the highly localized active switching region and filamentary conductive path. Coupled with its simple structure and compatibility with complementary metal oxide semiconductor (CMOS) processes; RRAM cells have demonstrated switching performance comparable to volatile memory technologies such as DRAMs and SRAMs. However, there are two serious barriers to RRAM commercialization. The first is the variability of the resistance state which is associated with the inherent randomness of the resistive switching mechanism. The second is the filamentary nature of the conductive path which makes it susceptible to noise. In this experimental thesis, a novel program-verify (P-V) technique was developed with the objective to specifically address the programming errors and to provide solutions to the most challenging issues associated with these intrinsic failures in current RRAM technology. The technique, called Compliance-free Ultra-short Smart Pulse Programming (CUSPP), utilizes sub-nanosecond pulses in a compliance-free setup to minimize the programming energy delivered per pulse. In order to demonstrate CUSPP, a custom-built picosecond pulse generator and feedback control circuit was designed. We achieved high (108 cycles) endurance with state verification for each cycle and established high-speed performance, such as 100 ps write/erase speed and 500 kHz cycling rate of HfO2-based RRAM cells. We also investigate switching failure and the short-term instability of the RRAM using CUSPP

Electronic Nanodevices

The start of high-volume production of field-effect transistors with a feature size below 100 nm at the end of the 20th century signaled the transition from microelectronics to nanoelectronics. Since then, downscaling in the semiconductor industry has continued until the recent development of sub-10 nm technologies. The new phenomena and issues as well as the technological challenges of the fabrication and manipulation at the nanoscale have spurred an intense theoretical and experimental research activity. New device structures, operating principles, materials, and measurement techniques have emerged, and new approaches to electronic transport and device modeling have become necessary. Examples are the introduction of vertical MOSFETs in addition to the planar ones to enable the multi-gate approach as well as the development of new tunneling, high-electron mobility, and single-electron devices. The search for new materials such as nanowires, nanotubes, and 2D materials for the transistor channel, dielectrics, and interconnects has been part of the process. New electronic devices, often consisting of nanoscale heterojunctions, have been developed for light emission, transmission, and detection in optoelectronic and photonic systems, as well for new chemical, biological, and environmental sensors. This Special Issue focuses on the design, fabrication, modeling, and demonstration of nanodevices for electronic, optoelectronic, and sensing applications

Towards Oxide Electronics:a Roadmap

At the end of a rush lasting over half a century, in which CMOS technology has been experiencing a constant and breathtaking increase of device speed and density, Moore's law is approaching the insurmountable barrier given by the ultimate atomic nature of matter. A major challenge for 21st century scientists is finding novel strategies, concepts and materials for replacing silicon-based CMOS semiconductor technologies and guaranteeing a continued and steady technological progress in next decades. Among the materials classes candidate to contribute to this momentous challenge, oxide films and heterostructures are a particularly appealing hunting ground. The vastity, intended in pure chemical terms, of this class of compounds, the complexity of their correlated behaviour, and the wealth of functional properties they display, has already made these systems the subject of choice, worldwide, of a strongly networked, dynamic and interdisciplinary research community. Oxide science and technology has been the target of a wide four-year project, named Towards Oxide-Based Electronics (TO-BE), that has been recently running in Europe and has involved as participants several hundred scientists from 29 EU countries. In this review and perspective paper, published as a final deliverable of the TO-BE Action, the opportunities of oxides as future electronic materials for Information and Communication Technologies ICT and Energy are discussed. The paper is organized as a set of contributions, all selected and ordered as individual building blocks of a wider general scheme. After a brief preface by the editors and an introductory contribution, two sections follow. The first is mainly devoted to providing a perspective on the latest theoretical and experimental methods that are employed to investigate oxides and to produce oxide-based films, heterostructures and devices. In the second, all contributions are dedicated to different specific fields of applications of oxide thin films and heterostructures, in sectors as data storage and computing, optics and plasmonics, magnonics, energy conversion and harvesting, and power electronics

Nanoscale Ferroic Materials—Ferroelectric, Piezoelectric, Magnetic, and Multiferroic Materials

Ferroic materials, including ferroelectric, piezoelectric, magnetic, and multiferroic materials, are receiving great scientific attention due to their rich physical properties. They have shown their great advantages in diverse fields of application, such as information storage, sensor/actuator/transducers, energy harvesters/storage, and even environmental pollution control. At present, ferroic nanostructures have been widely acknowledged to advance and improve currently existing electronic devices as well as to develop future ones. This Special Issue covers the characterization of crystal and microstructure, the design and tailoring of ferro/piezo/dielectric, magnetic, and multiferroic properties, and the presentation of related applications. These papers present various kinds of nanomaterials, such as ferroelectric/piezoelectric thin films, dielectric storage thin film, dielectric gate layer, and magnonic metamaterials. These nanomaterials are expected to have applications in ferroelectric non-volatile memory, ferroelectric tunneling junction memory, energy-storage pulsed-power capacitors, metal oxide semiconductor field-effect-transistor devices, humidity sensors, environmental pollutant remediation, and spin-wave devices. The purpose of this Special Issue is to communicate the recent developments in research on nanoscale ferroic materials

Phase Noise Analyses and Measurements in the Hybrid Memristor-CMOS Phase-Locked Loop Design and Devices Beyond Bulk CMOS

Phase-locked loop (PLLs) has been widely used in analog or mixed-signal integrated circuits. Since there is an increasing market for low noise and high speed devices, PLLs are being employed in communications. In this dissertation, we investigated phase noise, tuning range, jitter, and power performances in different architectures of PLL designs. More energy efficient devices such as memristor, graphene, transition metal di-chalcogenide (TMDC) materials and their respective transistors are introduced in the design phase-locked loop. Subsequently, we modeled phase noise of a CMOS phase-locked loop from the superposition of noises from its building blocks which comprises of a voltage-controlled oscillator, loop filter, frequency divider, phase-frequency detector, and the auxiliary input reference clock. Similarly, a linear time-invariant model that has additive noise sources in frequency domain is used to analyze the phase noise. The modeled phase noise results are further compared with the corresponding phase-locked loop designs in different n-well CMOS processes. With the scaling of CMOS technology and the increase of the electrical field, the problem of short channel effects (SCE) has become dominant, which causes decay in subthreshold slope (SS) and positive and negative shifts in the threshold voltages of nMOS and pMOS transistors, respectively. Various devices are proposed to continue extending Moore\u27s law and the roadmap in semiconductor industry. We employed tunnel field effect transistor owing to its better performance in terms of SS, leakage current, power consumption etc. Applying an appropriate bias voltage to the gate-source region of TFET causes the valence band to align with the conduction band and injecting the charge carriers. Similarly, under reverse bias, the two bands are misaligned and there is no injection of carriers. We implemented graphene TFET and MoS2 in PLL design and the results show improvements in phase noise, jitter, tuning range, and frequency of operation. In addition, the power consumption is greatly reduced due to the low supply voltage of tunnel field effect transistor