2 research outputs found
Hyperdimensional Computing Nanosystem
One viable solution for continuous reduction in energy-per-operation is to
rethink functionality to cope with uncertainty by adopting computational
approaches that are inherently robust to uncertainty. It requires a novel look
at data representations, associated operations, and circuits, and at materials
and substrates that enable them. 3D integrated nanotechnologies combined with
novel brain-inspired computational paradigms that support fast learning and
fault tolerance could lead the way. Recognizing the very size of the brain's
circuits, hyperdimensional (HD) computing can model neural activity patterns
with points in a HD space, that is, with hypervectors as large randomly
generated patterns. At its very core, HD computing is about manipulating and
comparing these patterns inside memory. Emerging nanotechnologies such as
carbon nanotube field effect transistors (CNFETs) and resistive RAM (RRAM), and
their monolithic 3D integration offer opportunities for hardware
implementations of HD computing through tight integration of logic and memory,
energy-efficient computation, and unique device characteristics. We
experimentally demonstrate and characterize an end-to-end HD computing
nanosystem built using monolithic 3D integration of CNFETs and RRAM. With our
nanosystem, we experimentally demonstrate classification of 21 languages with
measured accuracy of up to 98% on >20,000 sentences (6.4 million characters),
training using one text sample (~100,000 characters) per language, and
resilient operation (98% accuracy) despite 78% hardware errors in HD
representation (outputs stuck at 0 or 1). By exploiting the unique properties
of the underlying nanotechnologies, we show that HD computing, when implemented
with monolithic 3D integration, can be up to 420X more energy-efficient while
using 25X less area compared to traditional silicon CMOS implementations.Comment: 22 pages, 8 figure
A semi-holographic hyperdimensional representation system for hardware-friendly cognitive computing
One of the main, long-term objectives of artificial intelligence is the
creation of thinking machines. To that end, substantial effort has been placed
into designing cognitive systems; i.e. systems that can manipulate
semantic-level information. A substantial part of that effort is oriented
towards designing the mathematical machinery underlying cognition in a way that
is very efficiently implementable in hardware. In this work we propose a
'semi-holographic' representation system that can be implemented in hardware
using only multiplexing and addition operations, thus avoiding the need for
expensive multiplication. The resulting architecture can be readily constructed
by recycling standard microprocessor elements and is capable of performing two
key mathematical operations frequently used in cognition, superposition and
binding, within a budget of below 6 pJ for 64- bit operands. Our proposed
'cognitive processing unit' (CoPU) is intended as just one (albeit crucial)
part of much larger cognitive systems where artificial neural networks of all
kinds and associative memories work in concord to give rise to intelligence.Comment: 9 pages, 2 figures, 3 tables Submitted versio