Noise Analysis and Measurement of Integrator-based Sensor Interface Circuits for Fluorescence Detection in Lab-on-a-chip Applications

Lab-on-a-chip (LOC) biological assays have the potential to fundamentally reform healthcare. The move away from centralized facilities to Point-of-Care (POC) testing of biological assays would improve the speed and accuracy of these, thereby improving patient care. Before LOC can be realized, a number of challenges must be addressed: the need for expert users must be abstracted away; the manufacturing cost of $5 per test threshold must be met; and the supporting infrastructure must be integrated down to an easily portable size. These challenges can be addressed with the deposition of microfluidics on CMOS chips. By designing application specific integrated circuits (ASICs) much of the automation and the supporting infrastructure needed to run these assays can be integrated into the chip. Additionally, CMOS fabrication is some of the most optimized manufacturing in industry today. One of the central challenges with LOC on ASIC is the signal acquisition from the microfluidics into the CMOS. Optical sensing of fluorescence is one form of sensing used for LOC assays. Despite a large literature, there has not been a strong demonstration of monolithic LOC fluorescence detection (FD) for low concentration samples. This work explores the limit-of-detection (LOD) for LOC FD through analysis of the signal and noise of a proposed acquisition channel. The proposed signal acquisition channel consists of an on chip photodiode and integrator based amplification circuits. A hand analysis of the signal propagation through the channel and the noise sources introduced by the circuitry, is performed. This analysis is used to establish relationships between different circuit parameters and the LOD of a hypothetical LOC device. The hand analysis is verified through simulation and the acquisition channel is implemented in: (i) the Austrian Microsystems 350nm CMOS process, (ii) discrete components. Testing of the CMOS chip revealed several issues not identified in extracted simulation; however, the discrete integrator demonstrated many of the trends predicted by the hand analysis and simulations and achieved a LOD of 7.2$\mu M$. This analysis provides insight into the engineering trade-offs required to improve the LOD, to enable more wide spread application of LOC FD

An Integrated Polymer Based Polymerase Chain Reaction And Capillary Electrophoresis System For Genetic Diagnosis

Micro-Total-Analysis-Systems (µTAS) for genetic diagnosis have a great potential to revolutionize the future of health care. However the lack of µTAS, which is fully integrated, mass-producible and application oriented, has delayed µTAS development in real life application. In this work, I developed designs, protocols and supporting infrastructures for a polymer-based, fully integrable genetic diagnosis system capable of the Polymerase Chain Reaction (PCR) and Capillary Electrophoresis (CE). Each individual module could be integrated through a novel valve/pumping design and is fully capable of hand-free operation. These modules have been demonstrated to have a separation similar to our previous generation glass-based chips, which have previously proved the capability of genetic diagnosis. The integrated PCR module has demonstrated the concept of a CMOS compatible PCR system that is capable of mass-production. These discrete PCR modules are rapid prototypes. Using laser-based and milling machine-based rapid prototyping methods, the fabrication processes and module designs were developed. During this, the designs were studied through simulations and back-of-the-envelope (BOE) calculations. At the time of writing, the valving, PCR and CE modules have been successfully tested (with publications in print, in press and underway). In addition, a valving and CE combination has also been successfully demonstrated for a restriction fragment length polymorphism (RFLP) diagnostic and submitted for publication. All of these designs were intended to be developed in a manner that could be implemented in a PMMA chip, or on a future CMOS chip for greater cost reduction. This work has developed some of the key technologies for PCR-CE in a way that is scalable to such a CMOS system, notably with valves that can be used in a hybrid PMMA/CMOS system, and in testing a silicon based and robust temperature control system that could be implemented on CMOS

Navigating the lab-on-chip manufacturability roadblock: scalable, low-cost fluorescence detection for lab-on-chip instrumentation with rapid-prototyped microfluidics

Miniaturisation and automation of laboratory testing protocols onto microfluidic chips (lab-on-chip technology) could revolutionise diagnostic testing, though the key challenge of integrating high levels of functionality at a low-cost has so far prevented widespread adoption both in industry and academia. Specifically, implementation of a cost-accessible fluorescence detection has eluded the field and ensured nearly all commercial and academic instruments are too costly for routine applications. The field also faces a manufacturability problem, as it is dominated by expensive and/or low-throughput fabrication approaches. This thesis aims to address core concerns on both the instrument and fluidic chip fronts through the development of a low-cost fluorescence detection module capable of executing standard molecular diagnostics. The detection was inherently designed to interface with a series of rapid-prototyped polymer fluidics that I designed and fabricated with direct-write methods (micromilling and laser ablation) and minimal processing, allowing for quick iterations of fluidic designs while retaining compatibility with high throughput manufacturing procedures such as injection moulding. The result is a sub-$1000 prototype capable of executing gold-standard diagnostic testing at sub-$10 per chip, though the specific protocol development is still on-going. Finally, these components have been designed in a scalable manner such that it is feasible for future manufacturing to be done in a standard CMOS compatible process, a process that also faces manufacturability issues and high development costs that could be avoided by utilising these designs as prototyping testbeds. Thus, this work provides a roadmap from interim low-cost instrumentation and rapid-prototyping methods, through standard high volume polymer processing techniques, to a true single-chip device where the entire instrument may one day be fabricated at high volume in a USB-key sized package