Three-Dimensional Phylogeny Explorer: Distinguishing paralogs, lateral transfer, and violation of "molecular clock" assumption with 3D visualization

<p>Abstract</p> <p>Background</p> <p>Construction and interpretation of phylogenetic trees has been a major research topic for understanding the evolution of genes. Increases in sequence data and complexity are creating a need for more powerful and insightful tree visualization tools.</p> <p>Results</p> <p>We have developed 3D Phylogeny Explorer (3DPE), a novel phylogeny tree viewer that maps trees onto three spatial axes (species on the X-axis; paralogs on Z; evolutionary distance on Y), enabling one to distinguish at a glance evolutionary features such as speciation; gene duplication and paralog evolution; lateral gene transfer; and violation of the "molecular clock" assumption. Users can input any tree on the online 3DPE, then rotate, scroll, rescale, and explore it interactively as "live" 3D views. All objects in 3DPE are clickable to display subtrees, connectivity path highlighting, sequence alignments, and gene summary views, and etc. To illustrate the value of this visualization approach for microbial genomes, we also generated 3D phylogeny analyses for all clusters from the public COG database. We constructed tree views using well-established methods and graph algorithms. We used Scientific Python to generate VRML2 3D views viewable in any web browser.</p> <p>Conclusion</p> <p>3DPE provides a novel phylogenetic tree projection method into 3D space and its web-based implementation with live 3D features for reconstruction of phylogenetic trees of COG database.</p

Heuristics and Experimental Design for Bigraph Crossing Number Minimization

The bigraph crossing problem, embedding the two vertex sets of a bipartite graph G = (V0;V1;E) along two parallel lines so that edge crossings are minimized, has application to circuit layout and graph drawing. We consider the case where both V0 and V1 can be permuted arbitrarily -- both this and the case where the order of one vertex set is fixed are NP-hard. Two new heuristics that perform well on sparse graphs such as occur in circuit layout problems are presented. The new heuristics outperform existing heuristics on graph classes that range from application-specific to random. Our experimental design methodology ensures that differences in performance are statistically significant and not the result of minor variations in graph structure or input order