Global interconnect sizing and spacing with consideration of coupling capacitance

Abstract—This paper studies interconnect sizing and spacing (ISS) problem with consideration of coupling capacitance for performance optimization of single or multiple critical nets. We introduce the formulation of symmetric and asymmetric wire sizing. We develop efficient bound computation algorithms for ISS optimization and prove their optimality under general interconnect resistance and capacitance models. Our experiments show that our algorithms are very effective and obtain significant performance improvement compared to previous wire-sizing/spacing algorithms. Index Terms—Coupling capacitance, interconnect, wire sizing, wire spacing. I

Ein leitbahnorientiertes Verfahren für den physikalischen Entwurf integrierter digitaler Schaltungen

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