Full-Duplex Massive MIMO Relaying Systems with Low-Resolution ADCs

International audienceThis paper considers a multipair amplify-and-forward massive MIMO relaying system with low-resolution analog-to-digital converters (ADCs) at both the relay and destinations. The channel state information (CSI) at the relay is obtained via pilot training, which is then utilized to perform simple maximum-ratio combining/maximum-ratio transmission processing by the relay. Also, it is assumed that the destinations use statistical CSI to decode the transmitted signals. Exact and approximated closed-form expressions for the achievable sum rate are presented, which enable the efficient evaluation of the impact of key system parameters on the system performance. In addition, optimal relay power allocation scheme is studied, and power scaling law is characterized. It is found that, with only low-resolution ADCs at the relay, increasing the number of relay antennas is an effective method to compensate for the rate loss caused by coarse quantization. However, it becomes ineffective to handle the detrimental effect of low-resolution ADCs at the destination. Moreover, it is shown that deploying massive relay antenna arrays can still bring significant power savings, i.e., the transmit power of each source can be cut down proportional to 1/M to maintain a constant rate, where M is the number of relay antennas

DOA Estimation for Hybrid Massive MIMO Systems using Mixed-ADCs: Performance Loss and Energy Efficiency

Due to the power consumption and high circuit cost in antenna arrays, the practical application of massive multipleinput multiple-output (MIMO) in the sixth generation (6G) and future wireless networks is still challenging. Employing lowresolution analog-to-digital converters (ADCs) and hybrid analog and digital (HAD) structure is two low-cost choice with acceptable performance loss. In this paper, the combination of the mixedADC architecture and HAD structure employed at receiver is proposed for direction of arrival (DOA) estimation, which will be applied to the beamforming tracking and alignment in 6G. By adopting the additive quantization noise model, the exact closedform expression of the Cramer-Rao lower bound (CRLB) for the HAD architecture with mixed-ADCs is derived. Moreover, the closed-form expression of the performance loss factor is derived as a benchmark. In addition, to take power consumption into account, energy efficiency is also investigated in our paper. The numerical results reveal that the HAD structure with mixedADCs can significantly reduce the power consumption and hardware cost. Furthermore, that architecture is able to achieve a better trade-off between the performance loss and the power consumption. Finally, adopting 2-4 bits of resolution may be a good choice in practical massive MIMO systems.Comment: 11 pages, 7 figure

Hardware Impairments Aware Transceiver Design for Bidirectional Full-Duplex MIMO OFDM Systems

In this paper we address the linear precoding and decoding design problem for a bidirectional orthogonal frequencydivision multiplexing (OFDM) communication system, between two multiple-input multiple-output (MIMO) full-duplex (FD) nodes. The effects of hardware distortion as well as the channel state information error are taken into account. In the first step, we transform the available time-domain characterization of the hardware distortions for FD MIMO transceivers to the frequency domain, via a linear Fourier transformation. As a result, the explicit impact of hardware inaccuracies on the residual selfinterference (RSI) and inter-carrier leakage (ICL) is formulated in relation to the intended transmit/received signals. Afterwards, linear precoding and decoding designs are proposed to enhance the system performance following the minimum-mean-squarederror (MMSE) and sum rate maximization strategies, assuming the availability of perfect or erroneous CSI. The proposed designs are based on the application of alternating optimization over the system parameters, leading to a necessary convergence. Numerical results indicate that the application of a distortionaware design is essential for a system with a high hardware distortion, or for a system with a low thermal noise variance.Comment: Submitted to IEEE for publicatio