MLDRAM Fault Models and Tests for a 2-Bit-per-Cell MLDRAM

a cost-effective way to increase semiconductor memory storage density. The authors develop an MLDRAM fault model using both manual analysis and analog simulation. They also propose several alternative testing strategies and possible design-for-testability enhancements. OVER THE LAST 25 YEARS, the storage capacity of monolithic dynamic randomacces

Fault Models and Tests for a 2-Bit-per-Cell MLDRAM

a cost-effective way to increase semiconductor memory storage density. The authors develop an MLDRAM fault model using both manual analysis and analog simulation. They also propose several alternative testing strategies and possible design-for-testability enhancements. MLDRAM OVER THE LAST 25 YEARS, the storag