2 research outputs found
Modeling Shared Cache Performance of OpenMP Programs using Reuse Distance
Performance modeling of parallel applications on multicore computers remains
a challenge in computational co-design due to the complex design of multicore
processors including private and shared memory hierarchies. We present a
Scalable Analytical Shared Memory Model to predict the performance of parallel
applications that runs on a multicore computer and shares the same level of
cache in the hierarchy. This model uses a computationally efficient,
probabilistic method to predict the reuse distance profiles, where reuse
distance is a hardware architecture-independent measure of the patterns of
virtual memory accesses. It relies on a stochastic, static basic block-level
analysis of reuse profiles measured from the memory traces of applications ran
sequentially on small instances rather than using a multi-threaded trace. The
results indicate that the hit-rate predictions on the shared cache are
accurate
An Analytical Model for Performance and Lifetime Estimation of Hybrid DRAM-NVM Main Memories
NVMs have promising advantages (e.g., lower idle power, higher density) over
the existing predominant main memory technology, DRAM. Yet, NVMs also have
disadvantages (e.g., limited endurance). System architects are therefore
examining hybrid DRAM-NVM main memories to enable the advantages of NVMs while
avoiding the disadvantages as much as possible. Unfortunately, the hybrid
memory design space is very large and complex due to the existence of very
different types of NVMs and their rapidly-changing characteristics. Therefore,
optimization of performance and lifetime of hybrid memory based computing
platforms and their experimental evaluation using traditional simulation
methods can be very time-consuming and sometimes even impractical. As such, it
is necessary to develop a fast and flexible analytical model to estimate the
performance and lifetime of hybrid memories on various workloads. This paper
presents an analytical model for hybrid memories based on Markov decision
processes. The proposed model estimates the hit ratio and lifetime for various
configurations of DRAM-NVM hybrid main memories. Our model also provides
accurate estimation of the effect of data migration policies on the hybrid
memory hit ratio, one of the most important factors in hybrid memory
performance and lifetime. Such an analytical model can aid designers to tune
hybrid memory configurations to improve performance and/or lifetime. We present
several optimizations that make our model more efficient while maintaining its
accuracy. Our experimental evaluations show that the proposed model (a)
accurately predicts the hybrid memory hit ratio with an average error of 4.61%
on a commodity server, (b) accurately estimates the NVM lifetime with an
average error of 2.93%, and (c) is on average 4x faster than conventional
state-of-the-art simulation platforms for hybrid memories