Experiences Teaching Synthesis Of Fpgas And Testable Asics

Microelectronic system designers are increasingly capturing their designs using hardware description languages such as VHDL and Verilog. The designs are then most often synthesized into programmable logic devices such as field-programmable gate arrays (FPGAs). This approach places the emphasis on high-level design which reduces time to market by relying on synthesis software and programmable logic to produce workiag prototypes rapidly. These prototypes may then be altered as requirements change or converted into high-volume mask gate arrays or other application-specific integrated ciccuits (ASICs) when the demand is known to be sufficient. These ASICs, however, must be designed to be testable to screen out those with manufacturing defects. Hence, scan logic must be inserted, test vectors generated and fault grading performed to ensure a high level of testability. Experiences encountered from teaching a two-semester gradum!e sequence on these topics will be summarized

EXPERIENCES TEACHING SYNTHESIS OF FPGAS AND TESTABLE ASICS

Microelectronic system designers are increasingly capturing their designs using hardware description languages such as VHDL and Verilog. The designs are then most often synthesized into programmable logic devices such as eld-programmable gate arrays (FPGAs). This approach places the emphasis on high-level design which reduces time to market by relying on synthesis software and programmable logic to produce working prototypes rapidly. These prototypes may then be altered asrequirements change or converted into high-volume mask gate arrays or other application-speci c integrated circuits (ASICs) when the demand is known to be su cient. These ASICs, however, must be designed tobe testable to screen out those with manufacturing defects. Hence, scan logic must be inserted, test vectors generated and fault grading performed to ensure a high level of testability. Experiences encountered from teaching a two-semester graduate sequence on these topics will be summarized. 1