219,894 research outputs found
Stepping Stones to Inductive Synthesis of Low-Level Looping Programs
Inductive program synthesis, from input/output examples, can provide an
opportunity to automatically create programs from scratch without presupposing
the algorithmic form of the solution. For induction of general programs with
loops (as opposed to loop-free programs, or synthesis for domain-specific
languages), the state of the art is at the level of introductory programming
assignments. Most problems that require algorithmic subtlety, such as fast
sorting, have remained out of reach without the benefit of significant
problem-specific background knowledge. A key challenge is to identify cues that
are available to guide search towards correct looping programs. We present
MAKESPEARE, a simple delayed-acceptance hillclimbing method that synthesizes
low-level looping programs from input/output examples. During search, delayed
acceptance bypasses small gains to identify significantly-improved stepping
stone programs that tend to generalize and enable further progress. The method
performs well on a set of established benchmarks, and succeeds on the
previously unsolved "Collatz Numbers" program synthesis problem. Additional
benchmarks include the problem of rapidly sorting integer arrays, in which we
observe the emergence of comb sort (a Shell sort variant that is empirically
fast). MAKESPEARE has also synthesized a record-setting program on one of the
puzzles from the TIS-100 assembly language programming game.Comment: AAAI 201
FlashProfile: A Framework for Synthesizing Data Profiles
We address the problem of learning a syntactic profile for a collection of
strings, i.e. a set of regex-like patterns that succinctly describe the
syntactic variations in the strings. Real-world datasets, typically curated
from multiple sources, often contain data in various syntactic formats. Thus,
any data processing task is preceded by the critical step of data format
identification. However, manual inspection of data to identify the different
formats is infeasible in standard big-data scenarios.
Prior techniques are restricted to a small set of pre-defined patterns (e.g.
digits, letters, words, etc.), and provide no control over granularity of
profiles. We define syntactic profiling as a problem of clustering strings
based on syntactic similarity, followed by identifying patterns that succinctly
describe each cluster. We present a technique for synthesizing such profiles
over a given language of patterns, that also allows for interactive refinement
by requesting a desired number of clusters.
Using a state-of-the-art inductive synthesis framework, PROSE, we have
implemented our technique as FlashProfile. Across tasks over large
real datasets, we observe a median profiling time of only s.
Furthermore, we show that access to syntactic profiles may allow for more
accurate synthesis of programs, i.e. using fewer examples, in
programming-by-example (PBE) workflows such as FlashFill.Comment: 28 pages, SPLASH (OOPSLA) 201
LOT: Logic Optimization with Testability - new transformations for logic synthesis
A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random pattern testability. The method is based on structural transformations at the gate level. New transformations involving EX-OR gates as well as Reed–Muller expansions have been introduced in the synthesis of multilevel circuits. This method is augmented with transformations that specifically enhance random-pattern testability while reducing the area. Testability enhancement is an integral part of our synthesis methodology. Experimental results show that the proposed methodology not only can achieve lower area than other similar tools, but that it achieves better testability compared to available testability enhancement tools such as tstfx. Specifically for ISCAS-85 benchmark circuits, it was observed that EX-OR gate-based transformations successfully contributed toward generating smaller circuits compared to other state-of-the-art logic optimization tools
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