Design of binary weighted DAC for asynchronous ADC with improved slew rate and with calibrated size of capacitors

This work proposed a binary-weighted Digital-to-Analog Converter (DAC), which is designed to be used in Asynchronous successive approximation register (SAR) based Analog-to-digital converters (ADCs) specifically and in other relevant operations .The design has yielded an improved slew rate, and it is less prone to noise as the size of capacitors is taken in accordance with KT/C noise calculation. For achieving all mentioned goals, and to restrict the size of DAC, within suitable dimensions charge scaling DACs are used. One more advantage of this design is its accuracy, further it does not require op-Amps for its operation. Results of statistical simulation and mathematical consideration are published which depicts the supremacy of the design. A high-resolution DAC designed for this specific purpose has to have special consideration for the effect of local mismatch, parasitic and matching of the capacitors, for that, the common-centroid approach has been followed. This design has displayed a high resolution with small unit capacitances and that too without expensive factory calibration

Analog layout design automation: ILP-based analog routers

The shrinking design window and high parasitic sensitivity in the advanced technology have imposed special challenges on the analog and radio frequency (RF) integrated circuit design. In this thesis, we propose a new methodology to address such a deficiency based on integer linear programming (ILP) but without compromising the capability of handling any special constraints for the analog routing problems. Distinct from the conventional methods, our algorithm utilizes adaptive resolutions for various routing regions. For a more congested region, a routing grid with higher resolution is employed, whereas a lower-resolution grid is adopted to a less crowded routing region. Moreover, we strengthen its speciality in handling interconnect width control so as to route the electrical nets based on analog constraints while considering proper interconnect width to address the acute interconnect parasitics, mismatch minimization, and electromigration effects simultaneously. In addition, to tackle the performance degradation due to layout dependent effects (LDEs) and take advantage of optical proximity correction (OPC) for resolution enhancement of subwavelength lithography, in this thesis we have also proposed an innovative LDE-aware analog layout migration scheme, which is equipped with our special routing methodology. The LDE constraints are first identified with aid of a special sensitivity analysis and then satisfied during the layout migration process. Afterwards the electrical nets are routed by an extended OPC-inclusive ILP-based analog router to improve the final layout image fidelity while the routability and analog constraints are respected in the meantime. The experimental results demonstrate the effectiveness and efficiency of our proposed methods in terms of both circuit performance and image quality compared to the previous works

Passive Resonant Coil Based Fast Registration And Tracking System For Real-Time Mri-Guided Minimally Invasive Surgery

This thesis presents a single-slice based fast stereotactic registration and tracking technique along with a corresponding modular system for guiding robotic mechanism or interventional instrument to perform needle-based interventions under live MRI guidance. The system can provide tracking of full 6 degree-of-freedom (DOF) in stereotactic interventional surgery based upon a single, rapidly acquired cross-sectional image. The whole system is constructed with a modular data transmission software framework and mechanical structure so that it supports remote supervision and manipulation between a 3D Matlab tracking user interface (UI) and an existing MRI robot controller by using the OpenIGTLink network communication protocol. It provides better closed-loop control by implementing a feedback output interface to the MRI-guided robot. A new compact fiducial frame design is presented, and the fiducial is wrapped with a passive resonant coil. The coil resonates at the Larmor frequency for 3T MRI to enhance signal strength and enable for rapid imaging. The fiducial can be attached near the distal end of the robot and coaxially with a needle so as to visualize target tissue and track the surgical tool synchronously. The MRI-compatible design of fiducial frame, robust tracking algorithm and modular interface allow this tracking system to be conveniently used on different robots or devices and in different size of MRI bores. Several iterations of the tracking fiducial and passive resonant coils were constructed and evaluated in a Phillips Achieva 3T MRI. To assess accuracy and robustness of the tracking algorithm, 25 groups of images with different poses were successively scanned along specific sequence in and MRI experiment. The translational RMS error along depth is 0.271mm with standard deviation of 0.277mm for totally 100 samples. The overall angular RMS error is less than 0.426 degree with standard deviation of 0.526 degree for totally 150 samples. The passive resonant coils were shown to significantly increase signal intensity in the fiducial relative to the surroundings and provide for rapid imaging with low flip angles

Palmo : a novel pulsed based signal processing technique for programmable mixed-signal VLSI

In this thesis a new signal processing technique is presented. This technique exploits the use of pulses as the signalling mechanism. This Palmo 1 signalling method applied to signal processing is novel, combining the advantages of both digital and analogue techniques. Pulsed signals are robust, inherently low-power, easily regenerated, and easily distributed across and between chips. The Palmo cells used to perform analogue operations on the pulsed signals are compact, fast, simple and programmable

Assessing the performance of Digital Micromirror Devices for use in space-based multi-object spectrometers

A current need in space-based instrumentation is a reconfigurable slit mask. Several techniques for slit masks have been employed for ground-based astronomical spectrographs. These ground-based instruments have used large discrete components, which are impractical for remote operation in space-based deployment. The Texas Instruments\u27 Digital Micromirror Device (DMD) was originally conceived purely for display purposes, but is a viable candidate to be use as a slit mask in a space-based multi-object spectrograph (MOS). The Integrated Circuit (IC) manufacturing industry has enabled the robust integration of both silicon transistors and Micro-Electrical Mechanical Systems (MEMS) optical components into a very reliable monolithic chip (the DMD). The focus of this work was in three areas that addressed the suitability of proposing DMDs for future space missions. The DMDs were optically characterized to assess their utility in a spectrograph. The DMDs were also cooled in a liquid nitrogen dewar to determine their minimum operating temperature. The low temperature tests indicated that the DMD can operate to temperatures as low as 130 K. In addition, several DMDs were irradiated with high-energy protons at the LBNL 88 Cyclotron to determine how robust the devices are to ionizing radiation (protons). The radiation testing results indicate that DMDs would survive medium to long duration space missions with full operability. Based on preliminary tests in these three areas, the DMD should be considered as an excellent candidate for deployment in future space missions

Design techniques for low noise and high speed A/D converters

Analog-to-digital (A/D) conversion is a process that bridges the real analog world to digital signal processing. It takes a continuous-time, continuous amplitude signal as its input and outputs a discrete-time, discrete-amplitude signal. The resolution and sampling rate of an A/D converter vary depending on the application. Recently, there has been a growing demand for broadband (>1 MHz), high-resolution (>14bits) A/D converters. Applications that demand such converters include asymmetric digital subscriber line (ADSL) modems, cellular systems, high accuracy instrumentation, and medical imaging systems. This thesis suggests some design techniques for such high resolution and high sampling rate A/D converters. As the A/D converter performance keeps on increasing it becomes increasingly difficult for the input driver to settle to required accuracy within the sampling time. This is because of the use of larger sampling capacitor (increased resolution) and a decrease in sampling time (higher speed). So there is an increasing trend to have a driver integrated onchip along with A/D converter. The first contribution of this thesis is to present a new precharge scheme which enables integrating the input buffer with A/D converter in standard CMOS process. The buffer also uses a novel multi-path common mode feedback scheme to stabilize the common mode loop at high speeds. Another major problem in achieving very high Signal to Noise and Distortion Ratio (SNDR) is the capacitor mismatch in Digital to Analog Converters (DAC) inherent in the A/D converters. The mismatch between the capacitor causes harmonic distortion, which may not be acceptable. The analysis of Dynamic Element Matching (DEM) technique as applicable to broadband data-converters is presented and a novel second order notch-DEM is introduced. In this thesis we present a method to calibrate the DAC. We also show that a combination of digital error correction and dynamic element matching is optimal in terms of test time or calibration time. Even if we are using dynamic element matching techniques, it is still critical to get the best matching of unit elements possible in a given technology. The matching obtained may be limited either by random variations in the unit capacitor or by gradient effects. In this thesis we present layout techniques for capacitor arrays, and the matching results obtained in measurement from a test-chip are presented. Thus we present various design techniques for high speed and low noise A/D converters in this thesis. The techniques described are quite general and can be applied to most of the types of A/D converters