Programmable neural logic

Circuits of threshold elements (Boolean input, Boolean output neurons) have been shown to be surprisingly powerful. Useful functions such as XOR, ADD and MULTIPLY can be implemented by such circuits more efficiently than by traditional AND/OR circuits. In view of that, we have designed and built a programmable threshold element. The weights are stored on polysilicon floating gates, providing long-term retention without refresh. The weight value is increased using tunneling and decreased via hot electron injection. A weight is stored on a single transistor allowing the development of dense arrays of threshold elements. A 16-input programmable neuron was fabricated in the standard 2 μm double-poly, analog process available from MOSIS. We also designed and fabricated the multiple threshold element introduced in [5]. It presents the advantage of reducing the area of the layout from O(n^2) to O(n); (n being the number of variables) for a broad class of Boolean functions, in particular symmetric Boolean functions such as PARITY. A long term goal of this research is to incorporate programmable single/multiple threshold elements, as building blocks in field programmable gate arrays

On reliable computation over larger alphabets

We present two new positive results for reliable computation using formulas over physical alphabets of size $q > 2$. First, we show that for logical alphabets of size $\ell = q$ the threshold for denoising using gates subject to $q$-ary symmetric noise with error probability $\epsilon$ is strictly larger that possible for Boolean computation and we demonstrate a clone of $q$-ary functions that can be reliably computed up to this threshold. Secondly, we provide an example where $\ell < q$, showing that reliable Boolean computation can be performed using $2$-input ternary logic gates subject to symmetric ternary noise of strength $\epsilon < 1/6$ by using the additional alphabet element for error signalling.Comment: 14 pages, 2 figure

Hybrid quantum computing with ancillas

In the quest to build a practical quantum computer, it is important to use efficient schemes for enacting the elementary quantum operations from which quantum computer programs are constructed. The opposing requirements of well-protected quantum data and fast quantum operations must be balanced to maintain the integrity of the quantum information throughout the computation. One important approach to quantum operations is to use an extra quantum system - an ancilla - to interact with the quantum data register. Ancillas can mediate interactions between separated quantum registers, and by using fresh ancillas for each quantum operation, data integrity can be preserved for longer. This review provides an overview of the basic concepts of the gate model quantum computer architecture, including the different possible forms of information encodings - from base two up to continuous variables - and a more detailed description of how the main types of ancilla-mediated quantum operations provide efficient quantum gates.Comment: Review paper. An introduction to quantum computation with qudits and continuous variables, and a review of ancilla-based gate method

A formal model of asynchronous communication and its use in mechanically verifying a biphase mark protocol

In this paper we present a formal model of asynchronous communication as a function in the Boyer-Moore logic. The function transforms the signal stream generated by one processor into the signal stream consumed by an independently clocked processor. This transformation 'blurs' edges and 'dilates' time due to differences in the phases and rates of the two clocks and the communications delay. The model can be used quantitatively to derive concrete performance bounds on asynchronous communications at ISO protocol level 1 (physical level). We develop part of the reusable formal theory that permits the convenient application of the model. We use the theory to show that a biphase mark protocol can be used to send messages of arbitrary length between two asynchronous processors. We study two versions of the protocol, a conventional one which uses cells of size 32 cycles and an unconventional one which uses cells of size 18. We conjecture that the protocol can be proved to work under our model for smaller cell sizes and more divergent clock rates but the proofs would be harder

Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories

The fabrication of crossbar memories with sublithographic features is expected to be feasible within several emerging technologies; in all of them, the nanowire (NW) decoder is a critical part since it bridges the sublithographic wires to the outer circuitry that is defined on the lithography scale. In this paper, we evaluate the addressing scheme of the decoder circuit for NW crossbar arrays, based on the existing technological solutions for threshold voltage differentiation of NW devices. This is equivalent to using a multivalued logic addressing scheme. With this approach, it is possible to reduce the decoder size and keep it defect tolerant. We formally define two types of multivalued codes (i.e., hot and reflexive codes), and we estimate their yield under high variability conditions. Multivalued hot decoders yield better area saving than n-ary reflexive codes, and under severe conditions, reflexive codes enable a nonvanishing part of the code space to randomly recover. The choice of the optimal combination of decoder type and logic level saves area up to 24%. We also show that the precision of the addressing voltages when a high variability affects the threshold voltages is a crucial parameter for the decoder design and permits large savings in memory area. Moreover, a precise knowledge about the variability level improves the design of memory decoders by giving the right optimal code

QudCom: Towards Quantum Compilation for Qudit Systems

Qudit-based quantum computation offers unique advantages over qubit-based systems in terms of noise mitigation capabilities as well as algorithmic complexity improvements. However, the software ecosystem for multi-state quantum systems is severely limited. In this paper, we highlight a quantum workflow for describing and compiling qudit systems. We investigate the design and implementation of a quantum compiler for qudit systems. We also explore several key theoretical properties of qudit computing as well as efficient optimization techniques. Finally, we provide demonstrations using physical quantum computers as well as simulations of the proposed quantum toolchain