468 research outputs found
Reconfigurable nanoelectronics using graphene based spintronic logic gates
This paper presents a novel design concept for spintronic nanoelectronics
that emphasizes a seamless integration of spin-based memory and logic circuits.
The building blocks are magneto-logic gates based on a hybrid
graphene/ferromagnet material system. We use network search engines as a
technology demonstration vehicle and present a spin-based circuit design with
smaller area, faster speed, and lower energy consumption than the
state-of-the-art CMOS counterparts. This design can also be applied in
applications such as data compression, coding and image recognition. In the
proposed scheme, over 100 spin-based logic operations are carried out before
any need for a spin-charge conversion. Consequently, supporting CMOS
electronics requires little power consumption. The spintronic-CMOS integrated
system can be implemented on a single 3-D chip. These nonvolatile logic
circuits hold potential for a paradigm shift in computing applications.Comment: 14 pages (single column), 6 figure
Hybrid Piezoelectric-Magnetic Neurons: A Proposal for Energy-Efficient Machine Learning
This paper proposes a spintronic neuron structure composed of a
heterostructure of magnets and a piezoelectric with a magnetic tunnel junction
(MTJ). The operation of the device is simulated using SPICE models. Simulation
results illustrate that the energy dissipation of the proposed neuron compared
to that of other spintronic neurons exhibits 70% improvement. Compared to CMOS
neurons, the proposed neuron occupies a smaller footprint area and operates
using less energy. Owing to its versatility and low-energy operation, the
proposed neuron is a promising candidate to be adopted in artificial neural
network (ANN) systems.Comment: Submitted to: ACM Southeast '1
All-spin logic operations: Memory device and Reconfigurable computing
Exploiting spin degree of freedom of electron a new proposal is given to
characterize spin-based logical operations using a quantum interferometer that
can be utilized as a programmable spin logic device (PSLD). The ON and OFF
states of both inputs and outputs are described by {\em spin} state only,
circumventing spin-to-charge conversion at every stage as often used in
conventional devices with the inclusion of extra hardware that can eventually
diminish the efficiency. All possible logic functions can be engineered from a
single device without redesigning the circuit which certainly offers the
opportunities of designing new generation spintronic devices. Moreover we also
discuss the utilization of the present model as a memory device and suitable
computing operations with proposed experimental setups.Comment: 6 pages, 7 figure
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