1 research outputs found
Emulating Hybrid Memory on NUMA Hardware
Non-volatile memory (NVM) has the potential to disrupt the boundary between
memory and storage, including the abstractions that manage this boundary.
Researchers comparing the speed, durability, and abstractions of hybrid systems
with DRAM, NVM, and disk to traditional systems typically use simulation, which
makes it easy to evaluate different hardware technologies and parameters.
Unfortunately, simulation is extremely slow, limiting the number of
applications and dataset sizes in the evaluation. Simulation typically
precludes realistic multiprogram workloads and considering runtime and
operating system design alternatives. Good methodology embraces a variety of
techniques for validation, expanding the experimental scope, and uncovering new
insights. This paper introduces an emulation platform for hybrid memory that
uses commodity NUMA servers. Emulation complements simulation well, offering
speed and accuracy for realistic workloads, and richer software
experimentation. We use a thread-local socket to emulate DRAM and the remote
socket to emulate NVM. We use standard C library routines to allocate heap
memory in the DRAM or NVM socket for use with explicit memory management or
garbage collection. We evaluate the emulator using various configurations of
write-rationing garbage collectors that improve NVM lifetimes by limiting
writes to NVM, and use 15 applications from three benchmark suites with various
datasets and workload configurations. We show emulation enhances simulation
results. The two systems confirm most trends, such as NVM write and read rates
of different software configurations, increasing our confidence for predicting
future system effects. Emulation adds novel insights, such as the non-linear
effects of multi-program workloads on write rates