Lower bounds for dilation, wirelength, and edge congestion of embedding graphs into hypercubes

Interconnection networks provide an effective mechanism for exchanging data between processors in a parallel computing system. One of the most efficient interconnection networks is the hypercube due to its structural regularity, potential for parallel computation of various algorithms, and the high degree of fault tolerance. Thus it becomes the first choice of topological structure of parallel processing and computing systems. In this paper, lower bounds for the dilation, wirelength, and edge congestion of an embedding of a graph into a hypercube are proved. Two of these bounds are expressed in terms of the bisection width. Applying these results, the dilation and wirelength of embedding of certain complete multipartite graphs, folded hypercubes, wheels, and specific Cartesian products are computed

Expansion of layouts of complete binary trees into grids

AbstractLet Th be the complete binary tree of height h. Let M be the infinite grid graph with vertex set Z2, where two vertices (x1,y1) and (x2,y2) of M are adjacent if and only if |x1−x2|+|y1−y2|=1. Suppose that T is a tree which is a subdivision of Th and is also isomorphic to a subgraph of M. Motivated by issues in optimal VLSI design, we show that the point expansion ratio n(T)/n(Th)=n(T)/(2h+1−1) is bounded below by 1.122 for h sufficiently large. That is, we give bounds on how many vertices of degree 2 must be inserted along the edges of Th in order that the resulting tree can be laid out in the grid. Concerning the constructive end of VLSI design, suppose that T is a tree which is a subdivision of Th and is also isomorphic to a subgraph of the n×n grid graph. Define the expansion ratio of such a layout to be n2/n(Th)=n2/(2h+1−1). We show constructively that the minimum possible expansion ratio over all layouts of Th is bounded above by 1.4656 for sufficiently large h. That is, we give efficient layouts of complete binary trees into square grids, making improvements upon the previous work of others. We also give bounds for the point expansion and expansion problems for layouts of Th into extended grids, i.e. grids with added diagonals