Efficient Hardware Multiplicative Inverters

Abstract. We propose two hardware inverters for calculating the multiplicative inverses in finite fields GF (2 m): one produces a result in every O(m) time using O(m) area; and the other produces a result in every O(1) time using O � m 2 � area. While existing O(m)-time inverters require at least two shift registers in the datapath, the proposed O(m)-time implementation uses only one, thus costing less hardware. By exploiting the idea used in the O(m)-time inverter and developing a new way of controlling the dataflow, we also design a new O(1)-time inverter that works faster but costs less hardware than the best previously proposed O(1)-time implementation with the same area-time complexity.