Model order reduction of fully parameterized systems by recursive least square optimization

This paper presents an approach for the model order reduction of fully parameterized linear dynamic systems. In a fully parameterized system, not only the state matrices, but also can the input/output matrices be parameterized. The algorithm presented in this paper is based on neither conventional moment-matching nor balanced-truncation ideas. Instead, it uses “optimal (block) vectors” to construct the projection matrix, such that the system errors in the whole parameter space are minimized. This minimization problem is formulated as a recursive least square (RLS) optimization and then solved at a low cost. Our algorithm is tested by a set of multi-port multi-parameter cases with both intermediate and large parameter variations. The numerical results show that high accuracy is guaranteed, and that very compact models can be obtained for multi-parameter models due to the fact that the ROM size is independent of the number of parameters in our approach

Fast positive-real balanced truncation via quadratic alternating direction implicit iteration

Balanced truncation (BT), as applied to date in model order reduction (MOR), is known for its superior accuracy and computable error bounds. Positive-real BT (PRBT) is a particular BT procedure that preserves passivity and stability and imposes no structural constraints on the original state space. However, PRBT requires solving two algebraic Riccati equations (AREs), whose computational complexity limits its practical use in large-scale systems. This paper introduces a novel quadratic extension of the alternating direction implicit (ADI) iteration, which is called quadratic ADI (QADI), that efficiently solves an ARE. A Cholesky factor version of QADI, which is called CEQADI, exploits low-rank matrices and further accelerates PRBT. © 2007 IEEE.published_or_final_versio

Parallel Algorithms for Time and Frequency Domain Circuit Simulation

As a most critical form of pre-silicon verification, transistor-level circuit simulation is an indispensable step before committing to an expensive manufacturing process. However, considering the nature of circuit simulation, it can be computationally expensive, especially for ever-larger transistor circuits with more complex device models. Therefore, it is becoming increasingly desirable to accelerate circuit simulation. On the other hand, the emergence of multi-core machines offers a promising solution to circuit simulation besides the known application of distributed-memory clustered computing platforms, which provides abundant hardware computing resources. This research addresses the limitations of traditional serial circuit simulations and proposes new techniques for both time-domain and frequency-domain parallel circuit simulations. For time-domain simulation, this dissertation presents a parallel transient simulation methodology. This new approach, called WavePipe, exploits coarse-grained application-level parallelism by simultaneously computing circuit solutions at multiple adjacent time points in a way resembling hardware pipelining. There are two embodiments in WavePipe: backward and forward pipelining schemes. While the former creates independent computing tasks that contribute to a larger future time step, the latter performs predictive computing along the forward direction. Unlike existing relaxation methods, WavePipe facilitates parallel circuit simulation without jeopardizing convergence and accuracy. As a coarse-grained parallel approach, it requires low parallel programming effort, furthermore it creates new avenues to have a full utilization of increasingly parallel hardware by going beyond conventional finer grained parallel device model evaluation and matrix solutions. This dissertation also exploits the recently developed explicit telescopic projective integration method for efficient parallel transient circuit simulation by addressing the stability limitation of explicit numerical integration. The new method allows the effective time step controlled by accuracy requirement instead of stability limitation. Therefore, it not only leads to noticeable efficiency improvement, but also lends itself to straightforward parallelization due to its explicit nature. For frequency-domain simulation, this dissertation presents a parallel harmonic balance approach, applicable to the steady-state and envelope-following analyses of both driven and autonomous circuits. The new approach is centered on a naturally-parallelizable preconditioning technique that speeds up the core computation in harmonic balance based analysis. The proposed method facilitates parallel computing via the use of domain knowledge and simplifies parallel programming compared with fine-grained strategies. As a result, favorable runtime speedups are achieved

Theoretical and practical aspects of linear and nonlinear model order reduction techniques

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.Includes bibliographical references (p. 133-142).Model order reduction methods have proved to be an important technique for accelerating time-domain simulation in a variety of computer-aided design tools. In this study we present several new techniques for model reduction of the large-scale linear and nonlinear systems. First, we present a method for nonlinear system reduction based on a combination of the trajectory piecewise-linear (TPWL) method with truncated-balanced realizations (TBR). We analyze the stability characteristics of this combined method using perturbation theory. Second, we describe a linear reduction method that approximates TBR model reduction and takes advantage of sparsity of the system matrices or available accelerated solvers. This method is based on AISIAD (approximate implicit subspace iteration with alternate directions) and uses low-rank approximations of a system's gramians. This method is shown to be advantageous over the common approach of independently approximating the controllability and observability gramians, as such independent approximation methods can be inefficient when the gramians do not share a common dominant eigenspace. Third, we present a graph-based method for reduction of parameterized RC circuits. We prove that this method preserves stability and passivity of the models for nominal reduction. We present computational results for large collections of nominal and parameter-dependent circuits. Finally, we present a case study of model reduction applied to electroosmotic flow of a marker concentration pulse in a U-shaped microfluidic channel, where the marker flow in the channel is described by a three-dimensional convection-diffusion equation. First, we demonstrate the effectiveness of the modified AISIAD method in generating a low order models that correctly describe the dispersion of the marker in the linear case; that is, for the case of concentration-independent mobility and diffusion constants.(cont) Next, we describe several methods for nonlinear model reduction when the diffusion and mobility constants become concentration-dependent.by Dmitry Missiuro Vasilyev.Ph.D

Guaranteed passive parameterized model order reduction of the partial element equivalent circuit (PEEC) method

The decrease of IC feature size and the increase of operating frequencies require 3-D electromagnetic methods, such as the partial element equivalent circuit (PEEC) method, for the analysis and design of high-speed circuits. Very large systems of equations are often produced by 3-D electromagnetic methods. During the circuit synthesis of large-scale digital or analog applications, it is important to predict the response of the system under study as a function of design parameters, such as geometrical and substrate features, in addition to frequency (or time). Parameterized model order reduction (PMOR) methods become necessary to reduce large systems of equations with respect to frequency and other design parameters. We propose an innovative PMOR technique applicable to PEEC analysis, which combines traditional passivity-preserving model order reduction methods and positive interpolation schemes. It is able to provide parametric reduced-order models, stable, and passive by construction over a user-defined range of design parameter values. Numerical examples validate the proposed approach