Dynamic reconfigurable bus encoding scheme for reducing the energy consumption of deep sub-micron instruction bus

In very deep sub-micron designs, cross coupling capacitances become the dominant factor of the total bus loading and have a significant impact on the energy consumption. In this paper, we propose a re-configurable bus encoding scheme, which is based on the correlation among the bit lines, to reduce the energy consumption of the cross coupling capacitances of the instruction buses. The instruction is encoded by reordering the bit lines during compilation time to reduce the total cross coupling switching. A crossbar is used as a decoder to map back the data to the original instruction codeword before sending to the instruction decoder. The reordering can be reconfigured during run-time by using different configurations in the crossbar. Experimental results show that by using the proposed scheme, significant energy reduction, on average about 20%, can be achieved. Comparisons with existing fixed bit lines reordering encoding scheme have also been made and on average more than 15% reduction can be obtained using our method