3 research outputs found
Architectural level delay and leakage power modelling of manufacturing process variation
PhD ThesisThe effect of manufacturing process variations has become a major issue regarding the estimation of circuit delay and power dissipation, and will gain more importance in the future as device scaling continues in order to satisfy market place demands for circuits with greater performance and functionality per unit area. Statistical modelling and analysis approaches have been widely used to reflect the effects of a variety of variational process parameters on system performance factor which will be described as probability density functions (PDFs). At present most of the investigations into statistical models has been limited to small circuits such as a logic gate. However, the massive size of present day electronic systems precludes the use of design techniques which consider a system to comprise these basic gates, as this level of design is very inefficient and error prone.
This thesis proposes a methodology to bring the effects of process variation from transistor level up to architectural level in terms of circuit delay and leakage power dissipation. Using a first order canonical model and statistical analysis approach, a statistical cell library has been built which comprises not only the basic gate cell models, but also more complex functional blocks such as registers, FIFOs, counters, ALUs etc. Furthermore, other sensitive factors to the overall system performance, such as input signal slope, output load capacitance, different signal switching cases and transition types are also taken into account for each cell in the library, which makes it adaptive to an incremental circuit design.
The proposed methodology enables an efficient analysis of process variation effects on system performance with significantly reduced computation time compared to the Monte Carlo simulation approach. As a demonstration vehicle for this technique, the delay and leakage power distributions of a 2-stage asynchronous micropipeline circuit has been simulated using this cell library. The experimental results show that the proposed method can predict the delay and leakage power distribution with less than 5% error and at least 50,000 times faster computation time compare to 5000-sample SPICE based Monte Carlo simulation. The methodology presented here for modelling process variability plays a significant role in Design for Manufacturability (DFM) by quantifying the direct impact of process variations on system performance. The advantages of being able to undertake this analysis at a high level of abstraction and thus early in the design cycle are two fold. First, if the predicted effects of process variation render the circuit performance to be outwith specification, design modifications can be readily incorporated to rectify the situation. Second, knowing what the acceptable limits of process variation are to maintain design performance within its specification, informed choices can be made regarding the implementation technology and manufacturer selected to fabricate the design
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Electronic system modelling of UT pulser-receiver and the electron beam welding power source
This thesis was submitted for the degree of Doctor of Engineering and awarded by Brunel University.Continuous improvements to industrial equipment used in essential industrial applications are a key for the commercial success to the equipment manufacturers. Industrial applications always demand optimum performance and reliability and almost all equipment used in industrial applications is complex and are very expensive to replace. Often modifications to hardware and retrofitting additional hardware are encouraged by most equipment manufacturers and operators. The complexity of these systems however, makes assessment of modifications and design change difficult. This research implemented system modelling techniques to overcome this issue, by developing virtual test platforms of two distinctive industrial systems for enhancement assessment. The two distinctive systems were the electronic equipment called pulser-receiver used in ultrasonic non-destructive testing of safety critical oil & gas pipelines and a high voltage power supply used in high energy electron beam welding. Optimisation with emphasis on portability of the pulser-receiver and rapid weld recovery after a flashover fault condition in the electron beam welding application required assessment before design changes were made to hardware. SPICE based simulators LTSpice and PSpice were used to model and simulate the pulser-receiver and the welding power supply respectively. All the models were evaluated appropriately against theoretical data and published datasheets. However, validation of low level component models developed in the research against measurement data at a component level suffered due to system complexity and resource constraints. Close mapping of simulation results to measurement data at a system level were obtained. The research helped build up a wealth of knowledge in the development of circuit simulation models that can be analysed in the time domain with no non-convergent issues. Simulation settings were relaxed without compromising accuracy of model performance.The Engineering and Physical Sciences Research Board (EPSRC) and TWI Ltd