3 research outputs found

    Drop Impact Reliability of Edge-Bonded Lead-Free Chip Scale Packages

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    This paper presents the drop test reliability results for edge-bonded 0.5 mm pitch lead-free chip scale packages (CSPs) on a standard JEDEC drop reliability test board. The test boards were subjected to drop tests at several impact pulses, including a peak acceleration of 900 Gs with a pulse duration of 0.7 ms, a peak acceleration of 1500 Gs with a pulse duration of 0.5 ms, and a peak acceleration of 2900 Gs with a pulse duration of 0.3 ms. A high-speed dynamic resistance measurement system was used to monitor the failure of the solder joints. Two edge-bond materials used in this study were a UV-cured acrylic and a thermal-cured epoxy material. Tests were conducted on CSPs with edge-bond materials and CSPs without edge bonding. Statistics of the number of drops-to-failure for the 15 component locations on each test board are reported. The test results show that the drop test performance of edge-bonded CSPs is five to eight times better than the CSPs without edge bonding. Failure analysis was performed using dye-penetrant and scanning electron microscopy (SEM) methods. The most common failure mode observed is pad lift causing trace breakage. Solder crack and pad lift failure locations are characterized with the dye-penetrant method and optical microscopy

    MODELING RATE DEPENDENT DURABILITY OF LOW-Ag SAC INTERCONNECTS FOR AREA ARRAY PACKAGES UNDER TORSION LOADS

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    The thesis discusses modeling rate-dependent durability of solder interconnects under mechanical torsion loading for surface mount area array components. The study discusses an approach to incorporate strain-rate dependency in durability estimation for solder interconnects. The components under study are two configurations of BGAs (ball grid array) assembled with select lead-free solders. A torsion test setup is used to apply displacement controlled loads on the test board. Accelerated test load profile is experimentally determined. Torsion test is carried out for all the components under investigation to failure. Strain-rate dependent (Johnson-Cook model) and strain-rate independent, elastic-plastic properties are used to model the solders in finite element simulation. Damage model from literature is used to estimate the durability for SAC305 solder to validate the approach. Test data is used to extract damage model constants for SAC105 solder and extract mechanical fatigue durability curve

    Fiabilité et optimisation des structures mécaniques à paramètres incertains (application aux cartes électroniques)

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    L'objectif principal de cette thèse est l'étude de la fiabilité des cartes électroniques. Ces cartes sont utilisées dans plusieurs domaines, tels que l industrie automobile, l aéronautique, les télécommunications, le secteur médical, ..., etc. Elles assurent toutes les fonctions nécessaires au bon fonctionnement d un système électronique. Les cartes électroniques subissent diverses sollicitations (mécaniques, électriques et thermiques) durant la manipulation et la mise en service. Ces sollicitations sont dues aux chutes, aux vibrations et aux variations de température. Elles peuvent causer la rupture des joints de brasage des composants électroniques. Cette rupture entraine la défaillance du système électronique complet. Les objectifs de ce travail sont: - Développer un modèle numérique pour la simulation du drop-test d une carte électronique ; - Prédire la durée de vie en fatigue des joints de brasure en tenant compte des incertitudes des diverses variables ; - Développer une méthode d optimisation fiabiliste pour déterminer la géométrie optimale qui assure un niveau cible de fiabilité d une carte électronique ; - Application d une nouvelle méthode hybride d optimisation pour déterminer la géométrie optimale d une carte électronique et d un joint de brasure. Cette thèse a donné lieu à deux publications dans une revue indexée, et deux projets de publication et quatre communications dans des manifestations internationales.The main objective of this thesis is to study the electronics cards reliability. These cards are used in many fields, such as automotive, aerospace, telecommunications, medical. They provide all necessary electronic functions for well functioning of an electronic system. Electronic cards are undergoing various extreme stresses (mechanical, electrical, and thermal) when handling and commissioning. These stresses are due to drops, vibration and temperature variations. They may cause solder joints failures of electronic components. This may causes the failure of the entire electronic system. The objectives of this work are: To develop a numerical model to simulate the drop test of an electronic card; To predict the fatigue life of solder joints in uncertain environment of the variables; To develop a reliability-optimization method to determine the optimal geometry providing a targeted reliability level of an electronic card; To apply a new hybrid optimization method in order to determine the optimal geometry both of an electronic card and a solder joint.ROUEN-INSA Madrillet (765752301) / SudocSudocFranceF
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