4,808 research outputs found

    C-ASSURE-TAGUCHI FRAMEWORK FOR COST-EFFECTIVE HOLISTIC HEURISTIC IS EVALUATIONS

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    Execution/Simulation of Context/Constraint-aware Composite Services using GIPSY

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    For fulfilling a complex requirement comprising of several sub-tasks, a composition of simple web services, each of which is dedicated to performing a specific sub-task involved, proves to be a more competent solution in comparison to an equivalent atomic web service. Owing to advantages such as re-usability of components, broader options for composition requesters and liberty to specialize for component providers, for over two decades now, composite services have been extensively researched to the point of being perfected in many aspects. Yet, most of the studies undertaken in this field fail to acknowledge that every web service has a limited context in which it can successfully perform its tasks, the boundaries of which are defined by the internal constraints placed on the service by its providers. When used as part of a composition, the restricted context-spaces of all such component services together define the contextual boundaries of the composite service as a unit, which makes internal constraints an influential factor for composite service functionality. However, due to the limited exposure received by them, no systems have yet been proposed to cater to the specific verification of internal constraints imposed on components of a composite service. In an attempt to address this gap in service composition research, in this thesis, we propose a multi-faceted solution capable of not only automatically constructing context-aware composite web services with their internal constraints positioned for optimum resource-utilization but also of validating the generated compositions using the General Intensional Programming SYstem (GIPSY) as a time- and cost-efficient simulation/execution environment

    Fault tolerant architectures for integrated aircraft electronics systems, task 2

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    The architectural basis for an advanced fault tolerant on-board computer to succeed the current generation of fault tolerant computers is examined. The network error tolerant system architecture is studied with particular attention to intercluster configurations and communication protocols, and to refined reliability estimates. The diagnosis of faults, so that appropriate choices for reconfiguration can be made is discussed. The analysis relates particularly to the recognition of transient faults in a system with tasks at many levels of priority. The demand driven data-flow architecture, which appears to have possible application in fault tolerant systems is described and work investigating the feasibility of automatic generation of aircraft flight control programs from abstract specifications is reported

    Innovative Teaching Technology for Optimum Skill Development; The Paradigm Shift towards Quality Education as per NEP

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    What we are practicing today constitutes a traditional style of learning where as new education policy 2020 is looking forward to emphasize upon increasing GER & developing employable skills in the students through optimum learning methods. Since necessity is the mother of invention, so we need innovative learning pedagogy at distinct stages of education i.e. Primary Level, Secondary Level and Higher Education Level. As different age group learners get education at different aforesaid levels and therefore pedagogical styles may vary at Primary, Secondary & Higher Education level of education. Traditional teachers centric pedagogy as on today is gradually shifting towards more effective Learner’s Centric Pedagogy which provides learners a stress free environment, More flexibility and a greater participation than ever before in the history of learning. The paper attempts to investigate most recent innovative teaching practices and futuristic approaches particularly at Higher Education Level (Student Age 16 & above), that would help in developing employable skills in the learners to cater industrial needs. I wish to urge top decision makers to think a while over the findings of the paper for academic excellence especially in the context of higher education

    Automated methods of detailing reinforced concrete members

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    Reasons for the use of automated methods for the detailing of reinforced concrete members are described and the application of automation to the various parts of the detailing process is discussed. Particular attention is given to the problems of producing working information economically without suffering a loss of quality and clarity compared with existing manual techniques and the development of a suitable system for the production of working information is described. The problems of preventing interference between the reinforcement in different members at intersections are described and techniques for ensuring compatibility are discussed. The use of various types of computer is considered and the results of a survey into the capabilities of a number of types of small computer are set out. Finally the effects on both the design office and the site of the use of automated detailing techniques using the proposed method of producing working information are considered and an estimate made of the costs of implementing such a system, together with its possible savings

    Computer architecture for efficient algorithmic executions in real-time systems: New technology for avionics systems and advanced space vehicles

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    Improvements and advances in the development of computer architecture now provide innovative technology for the recasting of traditional sequential solutions into high-performance, low-cost, parallel system to increase system performance. Research conducted in development of specialized computer architecture for the algorithmic execution of an avionics system, guidance and control problem in real time is described. A comprehensive treatment of both the hardware and software structures of a customized computer which performs real-time computation of guidance commands with updated estimates of target motion and time-to-go is presented. An optimal, real-time allocation algorithm was developed which maps the algorithmic tasks onto the processing elements. This allocation is based on the critical path analysis. The final stage is the design and development of the hardware structures suitable for the efficient execution of the allocated task graph. The processing element is designed for rapid execution of the allocated tasks. Fault tolerance is a key feature of the overall architecture. Parallel numerical integration techniques, tasks definitions, and allocation algorithms are discussed. The parallel implementation is analytically verified and the experimental results are presented. The design of the data-driven computer architecture, customized for the execution of the particular algorithm, is discussed
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