2,580 research outputs found

    Quarc: a novel network-on-chip architecture

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    This paper introduces the Quarc NoC, a novel NoC architecture inspired by the Spidergon NoC. The Quarc scheme significantly outperforms the Spidergon NoC through balancing the traffic which is the result of the modifications applied to the topology and the routing elements.The proposed architecture is highly efficient in performing collective communication operations including broadcast and multicast. We present the topology, routing discipline and switch architecture for the Quarc NoC and demonstrate the performance with the results obtained from discrete event simulations

    Quarc: a high-efficiency network on-chip architecture

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    The novel Quarc NoC architecture, inspired by the Spidergon scheme is introduced as a NoC architecture that is highly efficient in performing collective communication operations including broadcast and multicast. The efficiency of the Quarc architecture is achieved through balancing the traffic which is the result of the modifications applied to the topology and the routing elements of the Spidergon NoC. This paper provides an ASIC implementation of both architectures using UMCpsilas 0.13 mum CMOS technology and demonstrates an analysis and comparison of the cost and performance between the Quarc and the Spidergon NoCs

    An efficient hybrid model and dynamic performance analysis for multihop wireless networks

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    Multihop wireless networks can be subjected to nonstationary phenomena due to a dynamic network topology and time varying traffic. However, the simulation techniques used to study multihop wireless networks focus on the steady-state performance even though transient or nonstationary periods will often occur. Moreover, the majority of the simulators suffer from poor scalability. In this paper, we develop an efficient performance modeling technique for analyzing the time varying queueing behavior of multihop wireless networks. The one-hop packet transmission (service) time is assumed to be deterministic, which could be achieved by contention-free transmission, or approximated in sparse or lightly loaded multihop wireless networks. Our model is a hybrid of time varying adjacency matrix and fluid flow based differential equations, which represent dynamic topology changes and nonstationary network queues, respectively. Numerical experiments show that the hybrid fluid based model can provide reasonably accurate results much more efficiently than standard simulators. Also an example application of the modeling technique is given showing the nonstationary network performance as a function of node mobility, traffic load and wireless link quality. © 2013 IEEE

    Low-overhead hard real-time aware interconnect network router

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    The increasing complexity of embedded systems is accelerating the use of multicore processors in these systems. This trend gives rise to new problems such as the sharing of on-chip network resources among hard real-time and normal best effort data traffic. We propose a network-on-chip router that provides predictable and deterministic communication latency for hard real-time data traffic while maintaining high concurrency and throughput for best-effort/general-purpose traffic with minimal hardware overhead. The proposed router requires less area than non-interfering networks, and provides better Quality of Service (QoS) in terms of predictability and determinism to hard real-time traffic than priority-based routers. We present a deadlock-free algorithm for decoupled routing of the two types of traffic. We compare the area and power estimates of three different router architectures with various QoS schemes using the IBM 45-nm SOI CMOS technology cell library. Performance evaluations are done using three realistic benchmark applications: a hybrid electric vehicle application, a utility grid connected photovoltaic converter system, and a variable speed induction motor drive application

    Handshaking Protocol for Distributed Implementation of Reo

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    Reo, an exogenous channel-based coordination language, is a model for service coordination wherein services communicate through connectors formed by joining binary communication channels. In order to establish transactional communication among services as prescribed by connector semantics, distributed ports exchange handshaking messages signalling which parties are ready to provide or consume data. In this paper, we present a formal implementation model for distributed Reo with communication delays and outline ideas for its proof of correctness. To reason about Reo implementation formally, we introduce Timed Action Constraint Automata (TACA) and explain how to compare TACA with existing automata-based semantics for Reo. We use TACA to describe handshaking behavior of Reo modeling primitives and argue that in any distributed circuit remote Reo nodes and channels exposing such behavior commit to perform transitions envisaged by the network semantics.Comment: In Proceedings FOCLASA 2014, arXiv:1502.0315
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