2 research outputs found
Detecting Tangled Logic Structures in VLSI Netlists
This thesis proposes a new problem of identifying large and tangled logic structures in a
synthesized netlist. Large groups of cells that are highly interconnected to each other can
often create potential routing hotspots that require special placement constraints. They can
also indicate problematic clumps of logic that either require resynthesis to reduce wiring
demand or specialized datapath placement. At a glance, this formulation appears similar
to conventional circuit clustering, but there are two important distinctions. First, we are
interested in finding large groups of cells that represent entire logic structures like adders
and decoders, as opposed to clusters with only a handful of cells. Second, we seek to pull
out only the structures of interest, instead of assigning every cell to a cluster to reduce
problem complexity. This work proposes new metrics for detecting structures based on
Rent’s rule that, unlike traditional cluster metrics, are able to fairly differentiate between
large and small groups of cells. Next, we demonstrate how these metrics can be applied to
identify structures in a netlist. Finally, our experiments demonstrate the ability to predict
and alleviate routing hotspots on a real industry design using our metrics and method
Rethinking Watermark: Providing Proof of IP Ownership in Modern SoCs
Intellectual property (IP) cores are essential to creating modern system-on-chips (SoCs). Protecting the IPs deployed in modern SoCs has become more difficult as the IP houses have been established across the globe over the past three decades. The threat posed by IP piracy and overuse has been a topic of research for the past decade or so and has led to creation of a field called watermarking. IP watermarking aims of detecting unauthorized IP usage by embedding excess, nonfunctional circuitry into the SoC. Unfortunately, prior work has been built upon assumptions that cannot be met within the modern SoC design and verification processes. In this paper, we first provide an extensive overview of the current state-of-the-art IP watermarking. Then, we challenge these dated assumptions and propose a new path for future effective IP watermarking approaches suitable for today\u27s complex SoCs in which IPs are deeply embedded