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2 research outputs found
(VLSI Design:An International Journal of Custom-Chip Design,Simulation and Testing,00(0):001-018)Defect Level Estimation for Pseudorandom Testing Using Stochastic Analysis
Author
D. C. Huang
S. C. Chang
S. R. Das
W. B. Jone
Publication venue
Malaysia: the Gordon and Breach Science Publishers
Publication date
06/06/2014
Field of study
No full text
National Chung Hsing University Institutional Repository