3 research outputs found

    ΠœΠ°Ρ‚Π΅ΠΌΠ°Ρ‚ΠΈΡ‡Π΅ΡΠΊΠΎΠ΅ ΠΌΠΎΠ΄Π΅Π»ΠΈΡ€ΠΎΠ²Π°Π½ΠΈΠ΅ процСссов выполнСния ΠΏΠ°ΠΊΠ΅Ρ‚ΠΎΠ² Π·Π°Π΄Π°Π½ΠΈΠΉ Π² ΠΊΠΎΠ½Π²Π΅ΠΉΠ΅Ρ€Π½Ρ‹Ρ… систСмах с ΠΏΡ€ΠΎΠΌΠ΅ΠΆΡƒΡ‚ΠΎΡ‡Π½Ρ‹ΠΌΠΈ Π±ΡƒΡ„Π΅Ρ€Π°ΠΌΠΈ ΠΎΠ³Ρ€Π°Π½ΠΈΡ‡Π΅Π½Π½Ρ‹Ρ… Ρ€Π°Π·ΠΌΠ΅Ρ€ΠΎΠ²

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    Modern methods of process planning in conveyor systems with buffers of a certain size between processing devices allow optimizing schedules for single tasks or fixed task packages with a limited number of them and a limited number of devices. The use of mathematical models of the processes of performing single tasks (task packages) used by these methods in optimizing the composition of packages and schedules for their execution in systems with an arbitrary number of packages and devices is impossible. At the same time, mathematical models of the processes of executing task packages in conveyor systems in the presence of buffers of limited sizes between devices are the basis for the development of methods for optimizing their (package) compositions and schedules for the implementation of actions with them on the devices of conveyor systems. In this regard, the article develops mathematical models of multi-stage processes of performing an arbitrary number of task packages in conveyor systems in the presence of intermediate buffers of limited sizes for two and three devices, as well as for an arbitrary number of devices. The use of these models makes it possible to determine the time points of the start of the execution of task packages on the devices of conveyor systems, taking into account the limited size of intermediate buffers, as well as the duration of time intervals for the use of these resources and the efficiency of their use over time. An algorithm has also been developed for mathematical modeling of the processes of executing task packages in conveyor systems in the presence of intermediate buffers of limited size, which calculates the time characteristics of these processes based on a given order of implementation of actions with task packages on the devices of conveyor systems. An application has been developed that implements synthesized mathematical models of the processes of executing task packages in conveyor systems with intermediate buffers of limited sizes and an appropriate method for modeling these processes. Versatile testing of the developed application has shown that the obtained mathematical models and the modeling method adequately describe the course of multi-stage processes of task packages in pipeline systems, set using different values of their (processes) parameters.Π‘ΠΎΠ²Ρ€Π΅ΠΌΠ΅Π½Π½Ρ‹Π΅ ΠΌΠ΅Ρ‚ΠΎΠ΄Ρ‹ планирования процСссов Π² ΠΊΠΎΠ½Π²Π΅ΠΉΠ΅Ρ€Π½Ρ‹Ρ… систСмах с Π±ΡƒΡ„Π΅Ρ€Π°ΠΌΠΈ ΠΎΠΏΡ€Π΅Π΄Π΅Π»Π΅Π½Π½ΠΎΠ³ΠΎ Ρ€Π°Π·ΠΌΠ΅Ρ€Π° ΠΌΠ΅ΠΆΠ΄Ρƒ ΠΎΠ±Ρ€Π°Π±Π°Ρ‚Ρ‹Π²Π°ΡŽΡ‰ΠΈΠΌΠΈ ΠΏΡ€ΠΈΠ±ΠΎΡ€Π°ΠΌΠΈ ΠΏΠΎΠ·Π²ΠΎΠ»ΡΡŽΡ‚ ΠΎΠΏΡ‚ΠΈΠΌΠΈΠ·ΠΈΡ€ΠΎΠ²Π°Ρ‚ΡŒ расписания выполнСния Π΅Π΄ΠΈΠ½ΠΈΡ‡Π½Ρ‹Ρ… Π·Π°Π΄Π°Π½ΠΈΠΉ Π»ΠΈΠ±ΠΎ фиксированных ΠΏΠ°ΠΊΠ΅Ρ‚ΠΎΠ² Π·Π°Π΄Π°Π½ΠΈΠΉ ΠΏΡ€ΠΈ ΠΈΡ… ΠΎΠ³Ρ€Π°Π½ΠΈΡ‡Π΅Π½Π½ΠΎΠΌ количСствС ΠΈ ΠΎΠ³Ρ€Π°Π½ΠΈΡ‡Π΅Π½Π½ΠΎΠΌ количСствС ΠΏΡ€ΠΈΠ±ΠΎΡ€ΠΎΠ². ΠŸΡ€ΠΈΠΌΠ΅Π½Π΅Π½ΠΈΠ΅ матСматичСских ΠΌΠΎΠ΄Π΅Π»Π΅ΠΉ процСссов выполнСния Π΅Π΄ΠΈΠ½ΠΈΡ‡Π½Ρ‹Ρ… Π·Π°Π΄Π°Π½ΠΈΠΉ (ΠΏΠ°ΠΊΠ΅Ρ‚ΠΎΠ² Π·Π°Π΄Π°Π½ΠΈΠΉ), ΠΈΡΠΏΠΎΠ»ΡŒΠ·ΡƒΠ΅ΠΌΡ‹Ρ… этими ΠΌΠ΅Ρ‚ΠΎΠ΄Π°ΠΌΠΈ, ΠΏΡ€ΠΈ ΠΎΠΏΡ‚ΠΈΠΌΠΈΠ·Π°Ρ†ΠΈΠΈ составов ΠΏΠ°ΠΊΠ΅Ρ‚ΠΎΠ² ΠΈ расписаний ΠΈΡ… выполнСния Π² систСмах с ΠΏΡ€ΠΎΠΈΠ·Π²ΠΎΠ»ΡŒΠ½Ρ‹ΠΌ количСством ΠΏΠ°ΠΊΠ΅Ρ‚ΠΎΠ² ΠΈ ΠΏΡ€ΠΈΠ±ΠΎΡ€ΠΎΠ² являСтся Π½Π΅Π²ΠΎΠ·ΠΌΠΎΠΆΠ½Ρ‹ΠΌ. Π’ Ρ‚ΠΎ ΠΆΠ΅ врСмя матСматичСскиС ΠΌΠΎΠ΄Π΅Π»ΠΈ процСссов выполнСния ΠΏΠ°ΠΊΠ΅Ρ‚ΠΎΠ² Π·Π°Π΄Π°Π½ΠΈΠΉ Π² ΠΊΠΎΠ½Π²Π΅ΠΉΠ΅Ρ€Π½Ρ‹Ρ… систСмах ΠΏΡ€ΠΈ Π½Π°Π»ΠΈΡ‡ΠΈΠΈ Π±ΡƒΡ„Π΅Ρ€ΠΎΠ² ΠΎΠ³Ρ€Π°Π½ΠΈΡ‡Π΅Π½Π½Ρ‹Ρ… Ρ€Π°Π·ΠΌΠ΅Ρ€ΠΎΠ² ΠΌΠ΅ΠΆΠ΄Ρƒ ΠΏΡ€ΠΈΠ±ΠΎΡ€Π°ΠΌΠΈ ΡΠ²Π»ΡΡŽΡ‚ΡΡ основой для Ρ€Π°Π·Ρ€Π°Π±ΠΎΡ‚ΠΊΠΈ ΠΌΠ΅Ρ‚ΠΎΠ΄ΠΎΠ² ΠΎΠΏΡ‚ΠΈΠΌΠΈΠ·Π°Ρ†ΠΈΠΈ ΠΈΡ… (ΠΏΠ°ΠΊΠ΅Ρ‚ΠΎΠ²) составов ΠΈ расписаний Ρ€Π΅Π°Π»ΠΈΠ·Π°Ρ†ΠΈΠΈ дСйствий с Π½ΠΈΠΌΠΈ Π½Π° ΠΏΡ€ΠΈΠ±ΠΎΡ€Π°Ρ… ΠΊΠΎΠ½Π²Π΅ΠΉΠ΅Ρ€Π½Ρ‹Ρ… систСм. Π’ связи с этим Π² ΡΡ‚Π°Ρ‚ΡŒΠ΅ Ρ€Π°Π·Ρ€Π°Π±ΠΎΡ‚Π°Π½Ρ‹ матСматичСскиС ΠΌΠΎΠ΄Π΅Π»ΠΈ многостадийных процСссов выполнСния ΠΏΡ€ΠΎΠΈΠ·Π²ΠΎΠ»ΡŒΠ½ΠΎΠ³ΠΎ количСства ΠΏΠ°ΠΊΠ΅Ρ‚ΠΎΠ² Π·Π°Π΄Π°Π½ΠΈΠΉ Π² ΠΊΠΎΠ½Π²Π΅ΠΉΠ΅Ρ€Π½Ρ‹Ρ… систСмах ΠΏΡ€ΠΈ Π½Π°Π»ΠΈΡ‡ΠΈΠΈ ΠΏΡ€ΠΎΠΌΠ΅ΠΆΡƒΡ‚ΠΎΡ‡Π½Ρ‹Ρ… Π±ΡƒΡ„Π΅Ρ€ΠΎΠ² ΠΎΠ³Ρ€Π°Π½ΠΈΡ‡Π΅Π½Π½Ρ‹Ρ… Ρ€Π°Π·ΠΌΠ΅Ρ€ΠΎΠ² для Π΄Π²ΡƒΡ… ΠΈ Ρ‚Ρ€Π΅Ρ… ΠΏΡ€ΠΈΠ±ΠΎΡ€ΠΎΠ², Π° Ρ‚Π°ΠΊΠΆΠ΅ для ΠΏΡ€ΠΎΠΈΠ·Π²ΠΎΠ»ΡŒΠ½ΠΎΠ³ΠΎ количСства ΠΏΡ€ΠΈΠ±ΠΎΡ€ΠΎΠ². ИспользованиС этих ΠΌΠΎΠ΄Π΅Π»Π΅ΠΉ позволяСт ΠΎΠΏΡ€Π΅Π΄Π΅Π»ΡΡ‚ΡŒ ΠΌΠΎΠΌΠ΅Π½Ρ‚Ρ‹ Π²Ρ€Π΅ΠΌΠ΅Π½ΠΈ Π½Π°Ρ‡Π°Π»Π° выполнСния ΠΏΠ°ΠΊΠ΅Ρ‚ΠΎΠ² Π·Π°Π΄Π°Π½ΠΈΠΉ Π½Π° ΠΏΡ€ΠΈΠ±ΠΎΡ€Π°Ρ… ΠΊΠΎΠ½Π²Π΅ΠΉΠ΅Ρ€Π½Ρ‹Ρ… систСм с ΡƒΡ‡Π΅Ρ‚ΠΎΠΌ ΠΎΠ³Ρ€Π°Π½ΠΈΡ‡Π΅Π½Π½Ρ‹Ρ… Ρ€Π°Π·ΠΌΠ΅Ρ€ΠΎΠ² ΠΏΡ€ΠΎΠΌΠ΅ΠΆΡƒΡ‚ΠΎΡ‡Π½Ρ‹Ρ… Π±ΡƒΡ„Π΅Ρ€ΠΎΠ², Π° Ρ‚Π°ΠΊΠΆΠ΅ Π΄Π»ΠΈΡ‚Π΅Π»ΡŒΠ½ΠΎΡΡ‚ΠΈ ΠΈΠ½Ρ‚Π΅Ρ€Π²Π°Π»ΠΎΠ² Π²Ρ€Π΅ΠΌΠ΅Π½ΠΈ использования этих рСсурсов ΠΈ ΡΡ„Ρ„Π΅ΠΊΡ‚ΠΈΠ²Π½ΠΎΡΡ‚ΡŒ ΠΈΡ… использования Π² Ρ‚Π΅Ρ‡Π΅Π½ΠΈΠ΅ Π²Ρ€Π΅ΠΌΠ΅Π½ΠΈ. Π’Π°ΠΊΠΆΠ΅ Ρ€Π°Π·Ρ€Π°Π±ΠΎΡ‚Π°Π½ Π°Π»Π³ΠΎΡ€ΠΈΡ‚ΠΌ матСматичСского модСлирования процСссов выполнСния ΠΏΠ°ΠΊΠ΅Ρ‚ΠΎΠ² Π·Π°Π΄Π°Π½ΠΈΠΉ Π² ΠΊΠΎΠ½Π²Π΅ΠΉΠ΅Ρ€Π½Ρ‹Ρ… систСмах ΠΏΡ€ΠΈ Π½Π°Π»ΠΈΡ‡ΠΈΠΈ ΠΏΡ€ΠΎΠΌΠ΅ΠΆΡƒΡ‚ΠΎΡ‡Π½Ρ‹Ρ… Π±ΡƒΡ„Π΅Ρ€ΠΎΠ² ΠΎΠ³Ρ€Π°Π½ΠΈΡ‡Π΅Π½Π½Ρ‹Ρ… Ρ€Π°Π·ΠΌΠ΅Ρ€ΠΎΠ², ΠΎΡΡƒΡ‰Π΅ΡΡ‚Π²Π»ΡΡŽΡ‰ΠΈΠΉ Π½Π° основС Π·Π°Π΄Π°Π½Π½ΠΎΠ³ΠΎ порядка Ρ€Π΅Π°Π»ΠΈΠ·Π°Ρ†ΠΈΠΈ дСйствий с ΠΏΠ°ΠΊΠ΅Ρ‚Π°ΠΌΠΈ Π·Π°Π΄Π°Π½ΠΈΠΉ Π½Π° ΠΏΡ€ΠΈΠ±ΠΎΡ€Π°Ρ… ΠΊΠΎΠ½Π²Π΅ΠΉΠ΅Ρ€Π½Ρ‹Ρ… систСм вычислСниС Π²Ρ€Π΅ΠΌΠ΅Π½Π½Ρ‹Ρ… характСристик этих процСссов. ΠžΡΡƒΡ‰Π΅ΡΡ‚Π²Π»Π΅Π½Π° Ρ€Π°Π·Ρ€Π°Π±ΠΎΡ‚ΠΊΠ° прилоТСния, Ρ€Π΅Π°Π»ΠΈΠ·ΡƒΡŽΡ‰Π΅Π³ΠΎ синтСзированныС матСматичСскиС ΠΌΠΎΠ΄Π΅Π»ΠΈ процСссов выполнСния ΠΏΠ°ΠΊΠ΅Ρ‚ΠΎΠ² Π·Π°Π΄Π°Π½ΠΈΠΉ Π² ΠΊΠΎΠ½Π²Π΅ΠΉΠ΅Ρ€Π½Ρ‹Ρ… систСмах с ΠΏΡ€ΠΎΠΌΠ΅ΠΆΡƒΡ‚ΠΎΡ‡Π½Ρ‹ΠΌΠΈ Π±ΡƒΡ„Π΅Ρ€Π°ΠΌΠΈ ΠΎΠ³Ρ€Π°Π½ΠΈΡ‡Π΅Π½Π½Ρ‹Ρ… Ρ€Π°Π·ΠΌΠ΅Ρ€ΠΎΠ² ΠΈ ΡΠΎΠΎΡ‚Π²Π΅Ρ‚ΡΡ‚Π²ΡƒΡŽΡ‰ΠΈΠΉ ΠΌΠ΅Ρ‚ΠΎΠ΄ модСлирования этих процСссов. РазностороннСС тСстированиС Ρ€Π°Π·Ρ€Π°Π±ΠΎΡ‚Π°Π½Π½ΠΎΠ³ΠΎ прилоТСния ΠΏΠΎΠΊΠ°Π·Π°Π»ΠΎ, Ρ‡Ρ‚ΠΎ ΠΏΠΎΠ»ΡƒΡ‡Π΅Π½Π½Ρ‹Π΅ матСматичСскиС ΠΌΠΎΠ΄Π΅Π»ΠΈ ΠΈ ΠΌΠ΅Ρ‚ΠΎΠ΄ модСлирования Π°Π΄Π΅ΠΊΠ²Π°Ρ‚Π½ΠΎ ΠΎΠΏΠΈΡΡ‹Π²Π°ΡŽΡ‚ Ρ…ΠΎΠ΄ многостадийных процСссов выполнСния ΠΏΠ°ΠΊΠ΅Ρ‚ΠΎΠ² Π·Π°Π΄Π°Π½ΠΈΠΉ Π² ΠΊΠΎΠ½Π²Π΅ΠΉΠ΅Ρ€Π½Ρ‹Ρ… систСмах, Π·Π°Π΄Π°Π²Π°Π΅ΠΌΡ‹ΠΉ с использованиСм Ρ€Π°Π·Π»ΠΈΡ‡Π½Ρ‹Ρ… Π·Π½Π°Ρ‡Π΅Π½ΠΈΠΉ ΠΈΡ… (процСссов) ΠΏΠ°Ρ€Π°ΠΌΠ΅Ρ‚Ρ€ΠΎΠ²

    Development and Simulation Assessment of Semiconductor Production System Enhancements for Fast Cycle Times

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    Long cycle times in semiconductor manufacturing represent an increasing challenge for the industry and lead to a growing need of break-through approaches to reduce it. Small lot sizes and the conversion of batch processes to mini-batch or single-wafer processes are widely regarded as a promising means for a step-wise cycle time reduction. Our analysis with discrete-event simulation and queueing theory shows that small lot size and the replacement of batch tools with mini-batch or single wafer tools are beneficial but lot size reduction lacks persuasive effectiveness if reduced by more than half. Because the results are not completely convincing, we develop a new semiconductor tool type that further reduces cycle time by lot streaming leveraging the lot size reduction efforts. We show that this combined approach can lead to a cycle time reduction of more than 80%

    Considering stockers in reentrant hybrid flow shop scheduling with limited buffer capacity

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    Diversification of products has increased the involvement of reentrant manufacturing processes, in which a job returns multiple times to a machine at the preceding workflow stage to continue the manufacturing process. Reentrant flow shop manufacturing can substantially improve manufacturing efficiency when scheduled properly. In practice, advanced manufacturing companies (e.g., semiconductor foundries) have introduced automated material handling system (AMHS), including stockers that serve as centralized inventory buffer space for temporarily storing the inventories owing to limited buffer capacity of each machine. However, no previous studies on reentrant flow shop scheduling have considered the impact of limited buffer capacity or stockers on scheduling efficiency. Consequently, this study investigated the application of stockers in solving the reentrant hybrid flow shop scheduling problem with limited buffer capacity. With the objective of optimizing the makespan and mean flowtime of a schedule, this problem is NP-hard because it generalizes the flow shop problem. Therefore, this study developed a hybrid harmony search and genetic algorithm (HHSGA) for the problem, in which limited buffer capacity and stockers cause solution decoding to be non-trivial. Experimental comparison on scheduling problems with different numbers of jobs showed that the HHSGA performed better than conventional algorithms. Moreover, among three manufacturing conditions (i.e., with buffers and stockers, with buffers only, and with stockers only), the results indicated that the condition using inventory buffers and stockers was more beneficial
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