2 research outputs found

    Compression Techniques for Improved Bandwidth and Static Code Size in Computer Systems

    No full text
    Technological improvements in integrated circuits have for a longtime allowed the performance of computer chips to growexponentially, allowing for more and more advancedsystems. Unfortunately, the I/O-pins connecting the processorcore/cores with memory and other devices have not seen the samerate of improvement. In this thesis I study the opportunities andchallenges with using compression to help solve some of thechallenges that have emerged. These include reducing thebandwidth needed and the static code size.The first part of the thesis addresses data-link compression. Bystudying the data transferred between the last-level cache andmain memory, several types of localities that can be used tocompress the data are identified. Current state-of-the-artcompression techniques are analyzed in the context of thiscategorization. Using this categorization, I show that it ispossible to combine techniques that work on different types oflocality into a more efficient compression algorithm. Moreover, Ishow how stateful compression schemes can be implemented inmulti-node systems.This thesis also considers efficient program representation. Inmost programs, identical sequences of instructions often appearin several places, making dictionary based compression anefficient scheme for reducing the static code size. In thisthesis I propose a new, more flexible scheme in which similarsequences of instructions can be represented by the samedictionary entry and executed with low hardware overhead.Finally, a code compression scheme targeting wide instructionformats is presented. The scheme is based on dynamic look-uptables, which allow the compiler to adapt the compression todifferent phases of the application. Also presented is amethodology for dimensioning the decompression engine and analgorithm for generating compressed programs that dynamicallymanage the look-up tables with little run-time performanceoverhead. The compression scheme is evaluated using FlexCore, anarchitecture with exposed datapath control, and shown toefficiently reduce the control-bits of the instruction word bymore than 50%

    Compression Techniques for Improved Bandwidth and Static Code Size in Computer Systems

    No full text
    Technological improvements in integrated circuits have for a longtime allowed the performance of computer chips to growexponentially, allowing for more and more advancedsystems. Unfortunately, the I/O-pins connecting the processorcore/cores with memory and other devices have not seen the samerate of improvement. In this thesis I study the opportunities andchallenges with using compression to help solve some of thechallenges that have emerged. These include reducing thebandwidth needed and the static code size.The first part of the thesis addresses data-link compression. Bystudying the data transferred between the last-level cache andmain memory, several types of localities that can be used tocompress the data are identified. Current state-of-the-artcompression techniques are analyzed in the context of thiscategorization. Using this categorization, I show that it ispossible to combine techniques that work on different types oflocality into a more efficient compression algorithm. Moreover, Ishow how stateful compression schemes can be implemented inmulti-node systems.This thesis also considers efficient program representation. Inmost programs, identical sequences of instructions often appearin several places, making dictionary based compression anefficient scheme for reducing the static code size. In thisthesis I propose a new, more flexible scheme in which similarsequences of instructions can be represented by the samedictionary entry and executed with low hardware overhead.Finally, a code compression scheme targeting wide instructionformats is presented. The scheme is based on dynamic look-uptables, which allow the compiler to adapt the compression todifferent phases of the application. Also presented is amethodology for dimensioning the decompression engine and analgorithm for generating compressed programs that dynamicallymanage the look-up tables with little run-time performanceoverhead. The compression scheme is evaluated using FlexCore, anarchitecture with exposed datapath control, and shown toefficiently reduce the control-bits of the instruction word bymore than 50%
    corecore