Compiler-Assisted Thread Level Control Speculation

Abstract. This paper proposes two compiler-assisted techniques to improve thread level control speculation in speculative multithreading execution. The first technique is to identify threads which have exactly one successor and the successor’s address is statically known (we call these threads fixed-successor threads), and use a small full associative buffer to predict the successors. This technique reduces aliasing in the original thread predictor and increases the overall prediction accuracy. The second technique is to insert validation information at points where the address of the successor thread is resolved. This early validation technique enables the processor to validate thread prediction earlier and reduce the penalty when a misprediction occurs. Our evaluation results show that for a 2K-entry predictor, a 5.8 % average performance improvement can be achieved by combining the two techniques.