1 research outputs found
Development of a fault tolerant MOS field effect power semiconductor switching transistor
This work describes the development of a semiconductor switch to replace an electromechanical
contactor as used within the electrical power distribution system of the More
Electric Aircraft (MEA; a project begun in the 1990‟s by the United States Air Force). The
MEA is safety critical and therefore requires highest reliability components and systems, but
subsequent to a short circuit load fault the electro-mechanical contactor switch often welds
shut. This risk is increased when using high discharge energy lithium ion dc batteries.
Predominately the semiconductor switch controls inductive loads and is required to safely
turn off current of up to 10 times the nominal level during sporadic load fault events. The
switch requires the lowest static loss (lowest on state resistance), but also the lowest
dynamic loss (losses due to the switching event). Presently, unipolar devices provide the
lowest dynamic loss, but bipolar devices provide the lowest static loss. One possible solution
is use of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), the area of which
is sized to suit the fault current, but at relatively high cost in terms of silicon area. The
resultant area is typically achieved by several die connected in parallel, unfortunately, such a
solution suffers from current share imbalance and the potential of cascade die failure. The
use of a parallel combination of unipolar and bipolar device types (MOSFET and Insulated
Gate Bipolar Transistors, IGBTs) to form a hybrid appears to offer the potential to reduce
the silicon area, and static loss, whilst reducing the impact of the increased dynamic losses
of the IGBT. Unfortunately, this goal requires optimised gate timing of the resultant hybrid
which proves challenging if the load current is to be shared appropriately during fault
switching in order to prevent failure. Some form of single MOS (Metal Oxide
Semiconductor) gated integrated hybrid device with self biased bipolar injection is therefore
required to ensure highest reliability through a non latching design which offers lowest
losses under all conditions and achieves an even temperature distribution.
In this work the novel concept of the integrated hybrid device has been investigated
at a low Blocking Voltage (BV) rating of 100 V, using computer simulation. The three
terminal hybrid silicon DMOS (Double diffused Metal Oxide Semiconductor) device utilises
a novel merged Schottky p-type injector to provide self biased entry into a reduced static
loss bipolar state in the event of high fault current. The device achieves a specific on state
resistance, R(ON,SP) = 1.16 mΩcm2 in bipolar mode (with BV=84 V), that is below the silicon
limit line and requires half the area of a traditional unipolar MOSFET to conduct fault
current. During comparative standard unclamped inductive switching trials, the hybrid
device provides a self clamping action which enables increased inductive energy switching
(higher inductance and/or higher load current), relative to that achieved by either the
MOSFET or IGBT. The hybrid conducting in bipolar mode switches an inductive load off
much faster than that typically achieved by an IGBT (toff =20 ns, in comparison to typically
>10 μs for an IGBT). This results in a low turn off energy for the hybrid (1.26*10-4 J/cm2) as
compared to that of the IGBT (8.72*10-3 J/cm2). The hybrid dynamic performance is
enhanced by the action of the merged Schottky contact which, unlike the IGBT, acts to limit
the emitter base voltage (VEB) of the internal PNP Bipolar Junction Transistor, BJT (the
integral PNP BJT is otherwise a shared feature with the IGBT). The self biased bipolar
activation is achieved at a forward bias (VAK) =1.3 V at temperature (T)= 300 K. The device
is latch up free across the operational temperature range of T=233 K to 400 K. A viable
charge balanced structure to increase the BV rating to approximately 600 V is also proposed.
The resulting performance of the single gated, self biased, hybrid, utilising a novel
merged Schottky/P type injector, could lead to a new class of rugged MOS gated power
switching devices in silicon and potentially silicon carbide