11,092 research outputs found
autoAx: An Automatic Design Space Exploration and Circuit Building Methodology utilizing Libraries of Approximate Components
Approximate computing is an emerging paradigm for developing highly
energy-efficient computing systems such as various accelerators. In the
literature, many libraries of elementary approximate circuits have already been
proposed to simplify the design process of approximate accelerators. Because
these libraries contain from tens to thousands of approximate implementations
for a single arithmetic operation it is intractable to find an optimal
combination of approximate circuits in the library even for an application
consisting of a few operations. An open problem is "how to effectively combine
circuits from these libraries to construct complex approximate accelerators".
This paper proposes a novel methodology for searching, selecting and combining
the most suitable approximate circuits from a set of available libraries to
generate an approximate accelerator for a given application. To enable fast
design space generation and exploration, the methodology utilizes machine
learning techniques to create computational models estimating the overall
quality of processing and hardware cost without performing full synthesis at
the accelerator level. Using the methodology, we construct hundreds of
approximate accelerators (for a Sobel edge detector) showing different but
relevant tradeoffs between the quality of processing and hardware cost and
identify a corresponding Pareto-frontier. Furthermore, when searching for
approximate implementations of a generic Gaussian filter consisting of 17
arithmetic operations, the proposed approach allows us to identify
approximately highly important implementations from possible
solutions in a few hours, while the exhaustive search would take four months on
a high-end processor.Comment: Accepted for publication at the Design Automation Conference 2019
(DAC'19), Las Vegas, Nevada, US
Programming Quantum Computers Using Design Automation
Recent developments in quantum hardware indicate that systems featuring more
than 50 physical qubits are within reach. At this scale, classical simulation
will no longer be feasible and there is a possibility that such quantum devices
may outperform even classical supercomputers at certain tasks. With the rapid
growth of qubit numbers and coherence times comes the increasingly difficult
challenge of quantum program compilation. This entails the translation of a
high-level description of a quantum algorithm to hardware-specific low-level
operations which can be carried out by the quantum device. Some parts of the
calculation may still be performed manually due to the lack of efficient
methods. This, in turn, may lead to a design gap, which will prevent the
programming of a quantum computer. In this paper, we discuss the challenges in
fully-automatic quantum compilation. We motivate directions for future research
to tackle these challenges. Yet, with the algorithms and approaches that exist
today, we demonstrate how to automatically perform the quantum programming flow
from algorithm to a physical quantum computer for a simple algorithmic
benchmark, namely the hidden shift problem. We present and use two tool flows
which invoke RevKit. One which is based on ProjectQ and which targets the IBM
Quantum Experience or a local simulator, and one which is based on Microsoft's
quantum programming language Q.Comment: 10 pages, 10 figures. To appear in: Proceedings of Design, Automation
and Test in Europe (DATE 2018
Design of Quantum Circuits for Galois Field Squaring and Exponentiation
This work presents an algorithm to generate depth, quantum gate and qubit
optimized circuits for squaring in the polynomial basis. Further, to
the best of our knowledge the proposed quantum squaring circuit algorithm is
the only work that considers depth as a metric to be optimized. We compared
circuits generated by our proposed algorithm against the state of the art and
determine that they require fewer qubits and offer gates savings that
range from to . Further, existing quantum exponentiation are
based on either modular or integer arithmetic. However, Galois arithmetic is a
useful tool to design resource efficient quantum exponentiation circuit
applicable in quantum cryptanalysis. Therefore, we present the quantum circuit
implementation of Galois field exponentiation based on the proposed quantum
Galois field squaring circuit. We calculated a qubit savings ranging between
to and quantum gate savings ranging between to
compared to identical quantum exponentiation circuit based on existing squaring
circuits.Comment: To appear in conference proceedings of the 2017 IEEE Computer Society
Annual Symposium on VLSI (ISVLSI 2017
Tensor Computation: A New Framework for High-Dimensional Problems in EDA
Many critical EDA problems suffer from the curse of dimensionality, i.e. the
very fast-scaling computational burden produced by large number of parameters
and/or unknown variables. This phenomenon may be caused by multiple spatial or
temporal factors (e.g. 3-D field solvers discretizations and multi-rate circuit
simulation), nonlinearity of devices and circuits, large number of design or
optimization parameters (e.g. full-chip routing/placement and circuit sizing),
or extensive process variations (e.g. variability/reliability analysis and
design for manufacturability). The computational challenges generated by such
high dimensional problems are generally hard to handle efficiently with
traditional EDA core algorithms that are based on matrix and vector
computation. This paper presents "tensor computation" as an alternative general
framework for the development of efficient EDA algorithms and tools. A tensor
is a high-dimensional generalization of a matrix and a vector, and is a natural
choice for both storing and solving efficiently high-dimensional EDA problems.
This paper gives a basic tutorial on tensors, demonstrates some recent examples
of EDA applications (e.g., nonlinear circuit modeling and high-dimensional
uncertainty quantification), and suggests further open EDA problems where the
use of tensor computation could be of advantage.Comment: 14 figures. Accepted by IEEE Trans. CAD of Integrated Circuits and
System
Synthesis and Optimization of Reversible Circuits - A Survey
Reversible logic circuits have been historically motivated by theoretical
research in low-power electronics as well as practical improvement of
bit-manipulation transforms in cryptography and computer graphics. Recently,
reversible circuits have attracted interest as components of quantum
algorithms, as well as in photonic and nano-computing technologies where some
switching devices offer no signal gain. Research in generating reversible logic
distinguishes between circuit synthesis, post-synthesis optimization, and
technology mapping. In this survey, we review algorithmic paradigms ---
search-based, cycle-based, transformation-based, and BDD-based --- as well as
specific algorithms for reversible synthesis, both exact and heuristic. We
conclude the survey by outlining key open challenges in synthesis of reversible
and quantum logic, as well as most common misconceptions.Comment: 34 pages, 15 figures, 2 table
Design Automation and Design Space Exploration for Quantum Computers
A major hurdle to the deployment of quantum linear systems algorithms and
recent quantum simulation algorithms lies in the difficulty to find inexpensive
reversible circuits for arithmetic using existing hand coded methods. Motivated
by recent advances in reversible logic synthesis, we synthesize arithmetic
circuits using classical design automation flows and tools. The combination of
classical and reversible logic synthesis enables the automatic design of large
components in reversible logic starting from well-known hardware description
languages such as Verilog. As a prototype example for our approach we
automatically generate high quality networks for the reciprocal , which is
necessary for quantum linear systems algorithms.Comment: 6 pages, 1 figure, in 2017 Design, Automation & Test in Europe
Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 201
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