Built-In-Chip Testing of Voltage Overshoots in High-Speed SoCs

We present a methodology to detect and measure the signal overshoots occurring on the interconnects of high-speed systemon -chips. Overshoots are known to inject hot-carriers into the gate oxide which cause permanent degradation of MOSFET transistors' performance over time. We propose a built-in chip mechanism to detect overshoots, collect the occurrence information and scan them out efficiently and inexpensively for built-in self-test, reliability analysis and diagnosis. Keywords: System-on-Chip, High-Speed Interconnect, Voltage Overshoot, Hot Carriers, Reliability Loss. I