49 research outputs found
A Multi Antenna Receiver for Galileo SoL Applications
One of the main features of the Galileo Satellite Navigation System is integrity. To ensure a reliable and robust navigation for Safety of Life applications, like CAT III aircraft landings, new receiver technologies are indispensable. Therefore, the German Aerospace Centre originated the development of a complete safety-of-life Galileo receiver to demonstrate the capabilities of new digital beam-forming and signal-processing algorithms for the detection and mitigation of interference. To take full advantage of those algorithms a carefully designed analogue signal processing is needed. The development addresses several challenging questions in the field of antenna design, frontend development and digital signal processing. The paper will give an insight in the activity and will present latest results
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Fully-integrated mm-Wave Full-duplexing and MIMO Multi-beamforming Receiver Techniques for 5G and Beyond
In recent years, the research community's interest in fully integrated mm-Wave wireless communication systems has increased significantly. With the standards for 5G NR now in place, the focus has shifted to actual deployment. Mm-Wave systems provide wider bandwidths, higher capacity, and lower latency than existing systems such as 4G. Higher path loss and shadowing, however, limit the network coverage at mm-Wave frequencies. The possibility of beamforming due to compact antenna size at mm-Wave and range-extending repeaters help mitigate challenges arising from path loss and relax link budget requirements. In the first part of the thesis, fully integrated scalable MIMO multi-beamforming phased-array to enable unit-tile based densely packed (lambda=2) large scale phased-arrays is demonstrated. Large scale arrays enhance Signal to Noise Ratio (SNR) and/or Effective Isotropically Radiated Power (EIRP) and help meet link budget. In the second part, mm-Wave Full-duplex (FD) receiver (RX) to implement Integrated Access and Backhaul (IAB) and repeaters in a spectrum efficient way is demonstrated. Dense deployment of IAB and repeaters enhances link robustness and range of connectivity. Two Integrated Chips (ICs) are fabricated and measured for demonstration. In the first IC, a 4-element MIMO RX array with multi-beamforming and simplified single wire intermediate frequency (IF) IO is presented. The evolution of mm-wave phased array receivers to MIMO RX promises multi-beamforming and improved capacity. Digital Beamforming (DBF) provides the highest flexibility for multibeamforming. However, it suffers from # of ADCs scaling with the # of elements and absence of spatial filtering prior to the ADCs. Mm-Wave MIMO arrays must also address the challenge of increased IO routing while supporting dense ll-factors with =2 antenna spacing. In this work, a MIMO multi-beamforming RX array architecture with simultaneous spatial filtering and single wire Frequency-domain Multiplexing (FDM) for 5G and beyond is presented. The proposed system preserves full MIMO field-of-view while ensuring a single IF interface. A 28 GHz 4-element RX prototype demonstrates the proposed functionality in 65-nm CMOS. The IC occupies only 3.4mm x 3.1mm for a four-element MIMO 28 GHz array and can form four independent beams with > 400MHz 3 dB BW and FDM on to a single IF interface. Mm-wave MIMO operation is demonstrated by concurrent reception of two wireless 28 GHz beams at 400 Mb/s (100 Msps, 16QAM) data rate. In the second IC, a 26-GHz fully integrated In-band Full-duplex (IBFD) Circulator receiver, which employs passive and active Self-interference Cancellation (SIC) techniques in the mm-Wave domain is presented. Coverage of wireless networks at mm-Wave frequencies can be enhanced by deploying a large number of base stations economically using wireless backhauling. Integrated access and backhaul nodes with spectrum reuse is an efficient way of wireless backhauling. To retain the channel capacity, IAB needs to be implemented using FD schemes that suffers from a strong Transmitter (TX) to RX leakage. This SI leakage can significantly impact the receiver sensitivity and increase the baseband/ADC dynamic range requirements. Canceling SI at mm-Wave applications is challenging given the high frequency of operation, wide bandwidths, and antenna (ANT) impedance sensitivity to the surroundings. Proposed mm-Wave RX with a shared ANT interface based on a Circulator with active SI cancelers provide ~53 dB SIC over 400MHz and ~40 dB SIC over 400MHz to meet the link budget requirements. Proposed architecture achieves SIC by (i) introducing a shared ANT interface based on a hybrid-coupler and a Non-reciprocal Transmission Line (NTL) that provides wideband SIC and additionally creating a SI replica (ii) subsequent active cancellation using SI replica along with variable gain and phase shifters to accommodate SI channel variations. Proposed 26-GHz RX consumes only ~111mW power. The system is implemented in 45nm SOI CMOS and has an active area of 4.54mm². Stand-alone RX NF is ~5.8 dB, and TX to ANT Insertion Loss (IL) is ~3.1 dB. Over-the-Air (OTA) measurements with modulated TX (128 QAM 2.1 Gb/s) and RX (128 QAM 4.2 Gb/s) signals show an EVM of 3.3% when PTX = PRX
An Investigation and Solution to Spatial Interferers Before RF Front End for Phased Arrays
Fully digital arrays offer significant advantages in terms of flexibility and performance, however they suffer from dynamic range issues when used in the presence of in-band interferers. Higher dynamic range components may be used, but are more costly and power-hungry, making the implementation of such technology impractical for large arrays. This paper presents a way to mitigate those interferers by creating a spatial notch at the RF front-end with an antenna agnostic circuit placed at the feeding network of the antenna. This circuit creates a steerable null in the embedded element pattern that mitigates interferers at a specified incoming angle. A full mathematical model and closed-form expressions of the behavior of the circuit are obtained and compared to simulated and measured results. Up to 20 dB null in the embedded element pattern of a 1x8 array is achieved with less than 1.5 dB of insertion loss. A steerable null using phase shifters is shown to prove real-time changes in the null placement. Phase shifters are substituted by tunable filters and enable a significant boost in the overall performance. To further validate the concept, a real case scenario is set up with a desired signal and an interferer that is initially saturating the receiver. The receiver successfully demodulates the signal after the null is placed in the direction of the interferer. The circuitry is then expanded to a planar array to fully optimize the interferer-free scanning volume
A CMOS Digital Beamforming Receiver
As the demand for high speed communication is increasing, emerging wireless techniques seek to utilize unoccupied frequency ranges, such as the mm-wave range. Due to high path loss for higher carrier frequencies, beamforming is an essential technology for mm-wave communication. Compared to analog beamforming, digital beamforming provides multiple simultaneous beams without an SNR penalty, is more accurate, enables faster steering, and provides full access to each element. Despite these advantages, digital beamforming has been limited by high power consumption, large die area, and the need for large numbers of analog-to-digital converters. Furthermore, beam squinting errors and ADC non-linearity limit the use of large digital beamforming arrays. We address these limitations.
First, we address the power and area challenge by combining Interleaved Bit Stream Processing (IL-BSP) with power and area efficient Continuous-Time Band-Pass Delta-Sigma Modulators (CTBPDSMs). Compared to conventional DSP, IL-BSP reduces both power and area by 80%. Furthermore, the new CTBPDSM architecture reduces ADC area by 67% and the energy per conversion by 43% compared to previous work.
Second, we introduce the first integrated digital true-time-delay digital beamforming receiver to resolve the beam squinting. True-time-delay beamforming eliminates squinting, making it an ideal choice for large-array wide-bandwidth applications.
Third, we present a new current-steering DAC architecture that provides a constant output impedance to improve ADC linearity. This significantly reduces distortion, leading to an SFDR improvement of 13.7 dB from the array.
Finally, we provide analysis to show that the ADC power consumption of a digital beamformer is comparable to that of the ADC power for an analog beamformer.
To summarize, we present a prototype phased array and a prototype timed array, both with 16 elements, 4 independent beams, a 1 GHz center frequency, and a 100 MHz bandwidth. Both the phased array and timed array achieve nearly ideal conventional and adaptive beam patterns, including beam tapering and adaptive nulling. With an 11.2 dB array gain, the phased array achieves a 58.5 dB SNDR over a 100 MHz bandwidth, while consuming 312 mW and occupying 0.22 mm2. The timed array achieves an EVM better than -37 dB for 5 MBd QAM-256 and QAM-512, occupies only 0.29 mm2, and consumes 453 mW.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/147716/1/smjang_1.pd
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Co-channel Blocker and Self-Interferer Tolerant Receiver Architectures for MIMO and Full-Duplex MIMO Receivers
This research focuses on receiver architectures which enable better spectral e�ciency
by handling blockers in the same spectral range as the signal. The presence of
such blockers, without the use of blocker cancelling/�ltering techniques leads to gain
compression and hence, consequent performance degradation of receivers leading to
reduced spectrum e�ciency. Two approaches have been devised, implemented in
silicon and measured to demonstrate that they alleviate the problems associated with
blockers. A system capable of handling co-channel spatially separated blockers is
implemented in the �rst work and another system capable of handling self-interference
caused due to the transmitter during full-duplex operation constitutes the second work.
In the �rst work, a 4-channel phased array based on a novel architecture incorporating
a coupler and a noise-cancelling LNA in combination with a polyphase �lter was
implemented to eliminate spatial co-channel blockers. This approach allows signal reception from all directions except from the direction of the blocker providing better
than 20dB blocker cancellation in the X-band. The second work is aimed at achieving
true simultaneous transmit-and-receive (STAR) performance through a hybrid coupler
based full-duplex integrated N-path based circulator-Rx architecture. STAR radios
enable higher spectrum e�ciency and dynamic spectrum access. Integrating the shared
antenna-interface is attractive for small-form factor and MIMO channel estimation.
Implemented for frequencies ranging from 550MHz to 900MHz this work addresses
the challenge of low-noise wideband self-interference-cancellation by demonstrating
a wide band hybrid-coupler circulator antenna interface using N-path mixers that
achieves low noise �gure while preserving the linearity of passive-mixer �rst receiver.
Better than +5.5dBm power handling of self-interference while providing over 40dB
average cancellation over a bandwidth of 56MHz with a 2.7dB noise �gure has been
measured. Further, the full-duplex circulator architecture has been expanded to
a MIMO implementation wherein we demonstrate a 65nm CMOS 2.2GHz 2x2 FD
MIMO RX that achieves up to 35/45dB average self-interference-cancellation (SIC)
across 40/20MHz BW with more than 42dB/53dB average cross-talk (CT)-SIC across
40/20MHz BW. Interference cancellation mechanisms cause < 2.1dB degradation
in RX NF and allows an overall TX power handling of +14dBm enabled by clock
bootstrapping
Energy Efficient VLSI Circuits for MIMO-WLAN
Mobile communication - anytime, anywhere access to data and communication services - has been continuously increasing since the operation of the first wireless communication link by Guglielmo Marconi. The demand for higher data rates, despite the limited bandwidth, led to the development of multiple-input multiple-output (MIMO) communication which is often combined with orthogonal frequency division multiplexing (OFDM). Together, these two techniques achieve a high bandwidth efficiency. Unfortunately, techniques such as MIMO-OFDM significantly increase the signal processing complexity of transceivers. While fast improvements in the integrated circuit (IC) technology enabled to implement more signal processing complexity per chip, large efforts had and have to be done for novel algorithms as well as for efficient very large scaled integration (VLSI) architectures in order to meet today's and tomorrow's requirements for mobile wireless communication systems. In this thesis, we will present architectures and VLSI implementations of complete physical (PHY) layer application specific integrated circuits (ASICs) under the constraints imposed by an industrial wireless communication standard. Contrary to many other publications, we do not elaborate individual components of a MIMO-OFDM communication system stand-alone, but in the context of the complete PHY layer ASIC. We will investigate the performance of several MIMO detectors and the corresponding preprocessing circuits, being integrated into the entire PHY layer ASIC, in terms of achievable error-rate, power consumption, and area requirement. Finally, we will assemble the results from the proposed PHY layer implementations in order to enhance the energy efficiency of a transceiver. To this end, we propose a cross-layer optimization of PHY layer and medium access control (MAC) layer
Design of antenna array and data streaming platform for low-cost smart antenna systems
The wide range of wireless infrastructures such as cellular base stations, wireless hotspots, roadside infrastructures, and wireless mobile infrastructures have been increasing rapidly over the past decades. In the transportation sector, wireless technology refreshes require constantly introducing newer wireless standards into the existing wireless infrastructure. Different wireless standards are expected to co-exist, and the air space congestion worsens if the wireless devices are operating in different wireless standards, where collision avoidance and transmission time synchronisation become complex and almost impossible. Huge challenges are expected such as operation constraints, cross-system interference, and air space congestion. Future proof and scalable smart wireless infrastructures are crucial to harmonise the un-coordinated wireless infrastructures and improve the performance, reliability, and availably of the wireless networks. This thesis presents the detailed design of a novel pre-configurable smart antenna system and its sub-system including antenna element, antenna array, and radio frequency (RF) frontend. Three types of 90° beamforming antenna array (with low, middle and high gain) were designed, simulated, and experimentally evaluated. The RF frontend module or transmit and receive (T/R) module was designed and fabricated. The performance of the T/R module was characterised and calibrated using the recursive calibration method, and drastic sidelobe level (SLL) improvement was achieved using the amplitude distribution technique. Finally, the antenna arrays and T/R modules are integrated into the pre-configurable smart antenna system, the beam steering performance is experimentally evaluated and presented in this thesis.
With the combination of practical know-how and theoretical estimation, the thesis highlights how the modern smart antenna techniques that support most cutting-edge wireless technology can be adopted into the existing infrastructure with minimum distraction to the existing systems. This is in line with the global Smart City initiative, where a huge number of Internet of Things (IoT) devices being wired, or wireless are expected to work harmoniously in the same premises. The concept of the pre-configurable smart antenna system presented in this thesis is set to deliver a future-proof and highly scalable and sustainable infrastructure in the transportation market
Interference Suppression for Spread Spectrum Signals Using Adaptive Beamforming and Adaptive Temporal Filter
Interference and jamming signals are a serious concern in an operational military communication environment. This thesis examines the utility and performance of combining adaptive temporal filtering with adaptive spatial filtering (i.e. adaptive beamforming) to improve the signal-to-jammer ratio (SJR) in the presence of narrowband and wideband interference. Adaptive temporal filters are used for narrowband interference suppression while adaptive beamforming is used to suppress wideband interference signals. A procedure is presented for the design and implementation of a linear constraints minimum variance generalized sidelobe canceler (LCMV-GSC) beamformer. The adaptive beamformer processes the desired signal with unity gain while simultaneously and adaptively minimizing the output due to any undesired signal. Using the LCMV-GSC beamformer with a least mean squares (LMS) adaptive algorithm, it was shown that the tapped delay line (TDL) adaptive antenna array is more effective for the suppression of wideband jammer suppression than the linear array sensors (LAS) adaptive antenna array. Also a new technique for adaptive beamforming is presented which improves wideband interference suppression in a frequency-hopped environment. The output SJR improvement for the new technique compared to the conventional technique is as much as 15dB. Sometimes, multipath signals and jammers generated by a smart enemy are correlated with the desired signal which destroys the traditional beamformer\u27s performance. After performing a spatial smoothing technique, adaptive beamforming can also be effective in suppressing the jamming signals that are highly correlated with the desired signal