33,586 research outputs found
Programming MPSoC platforms: Road works ahead
This paper summarizes a special session on multicore/multi-processor system-on-chip (MPSoC) programming challenges. The current trend towards MPSoC platforms in most computing domains does not only mean a radical change in computer architecture. Even more important from a SW developer´s viewpoint, at the same time the classical sequential von Neumann programming model needs to be overcome. Efficient utilization of the MPSoC HW resources demands for radically new models and corresponding SW development tools, capable of exploiting the available parallelism and guaranteeing bug-free parallel SW. While several standards are established in the high-performance computing domain (e.g. OpenMP), it is clear that more innovations are required for successful\ud
deployment of heterogeneous embedded MPSoC. On the other hand, at least for coming years, the freedom for disruptive programming technologies is limited by the huge amount of certified sequential code that demands for a more pragmatic, gradual tool and code replacement strategy
The TASTE Toolset: turning human designed heterogeneous systems into computer built homogeneous software.
The TASTE tool-set results from spin-off studies of the ASSERT project, which started in 2004 with the objective to propose innovative and pragmatic solutions to develop real-time software. One of the primary targets was satellite flight software, but it appeared quickly that their characteristics were shared among various embedded systems. The solutions that we developed now comprise a process and several tools ; the development process is based on the idea that real-time, embedded systems are heterogeneous by nature and that a unique UML-like language was not helping neither their construction, nor their validation. Rather than inventing yet another "ultimate" language, TASTE makes the link between existing and mature technologies such as Simulink, SDL, ASN.1, C, Ada, and generates complete, homogeneous software-based systems that one can straightforwardly download and execute on a physical target. Our current prototype is moving toward a marketed product, and sequel studies are already in place to support, among others, FPGA systems
An Algebraic Framework for the Real-Time Solution of Inverse Problems on Embedded Systems
This article presents a new approach to the real-time solution of inverse
problems on embedded systems. The class of problems addressed corresponds to
ordinary differential equations (ODEs) with generalized linear constraints,
whereby the data from an array of sensors forms the forcing function. The
solution of the equation is formulated as a least squares (LS) problem with
linear constraints. The LS approach makes the method suitable for the explicit
solution of inverse problems where the forcing function is perturbed by noise.
The algebraic computation is partitioned into a initial preparatory step, which
precomputes the matrices required for the run-time computation; and the cyclic
run-time computation, which is repeated with each acquisition of sensor data.
The cyclic computation consists of a single matrix-vector multiplication, in
this manner computation complexity is known a-priori, fulfilling the definition
of a real-time computation. Numerical testing of the new method is presented on
perturbed as well as unperturbed problems; the results are compared with known
analytic solutions and solutions acquired from state-of-the-art implicit
solvers. The solution is implemented with model based design and uses only
fundamental linear algebra; consequently, this approach supports automatic code
generation for deployment on embedded systems. The targeting concept was tested
via software- and processor-in-the-loop verification on two systems with
different processor architectures. Finally, the method was tested on a
laboratory prototype with real measurement data for the monitoring of flexible
structures. The problem solved is: the real-time overconstrained reconstruction
of a curve from measured gradients. Such systems are commonly encountered in
the monitoring of structures and/or ground subsidence.Comment: 24 pages, journal articl
Towards Python-based Domain-specific Languages for Self-reconfigurable Modular Robotics Research
This paper explores the role of operating system and high-level languages in
the development of software and domain-specific languages (DSLs) for
self-reconfigurable robotics. We review some of the current trends in
self-reconfigurable robotics and describe the development of a software system
for ATRON II which utilizes Linux and Python to significantly improve software
abstraction and portability while providing some basic features which could
prove useful when using Python, either stand-alone or via a DSL, on a
self-reconfigurable robot system. These features include transparent socket
communication, module identification, easy software transfer and reliable
module-to-module communication. The end result is a software platform for
modular robots that where appropriate builds on existing work in operating
systems, virtual machines, middleware and high-level languages.Comment: Presented at DSLRob 2011 (arXiv:1212.3308
Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey and Future Directions
In the past decade, Convolutional Neural Networks (CNNs) have demonstrated
state-of-the-art performance in various Artificial Intelligence tasks. To
accelerate the experimentation and development of CNNs, several software
frameworks have been released, primarily targeting power-hungry CPUs and GPUs.
In this context, reconfigurable hardware in the form of FPGAs constitutes a
potential alternative platform that can be integrated in the existing deep
learning ecosystem to provide a tunable balance between performance, power
consumption and programmability. In this paper, a survey of the existing
CNN-to-FPGA toolflows is presented, comprising a comparative study of their key
characteristics which include the supported applications, architectural
choices, design space exploration methods and achieved performance. Moreover,
major challenges and objectives introduced by the latest trends in CNN
algorithmic research are identified and presented. Finally, a uniform
evaluation methodology is proposed, aiming at the comprehensive, complete and
in-depth evaluation of CNN-to-FPGA toolflows.Comment: Accepted for publication at the ACM Computing Surveys (CSUR) journal,
201
- …