2 research outputs found
Towards Hardware implementation of video applications in new telecommunications devices
Among the areas, most demanding in terms of calculation is the
telecommunication and video applications are now included in several
telecommunication devices such as set-top boxes, mobile phones. Embedded videos
applications in new generations of telecommunication devices need a processing
capacity that can not be achieved by the conventional processor, to work around
this problem the use of programmable technology has a lot of interest. First,
Field Programmable Gate Arrays (FPGAs) present many performance benefits for
real-time image processing applications. The FPGA structure is able to exploit
spatial and temporal parallelism. In this paper, we present a new method for
implementation of the Color Structure Descriptor (CSD) using the FPGA circuit.
In fact the (CSD) provides satisfactory image indexing and retrieval results
among all colorbased descriptors in MPEG-7. But the real time implementation of
this descriptor is still having problems. In this paper we propose a method for
adapting this descriptor for possible implementation under the constraints of
the video processing in real time. We have verified the real-time
implementation of the (CSD) with an image size of 120*80 pixels.Comment: Lamjed Touil, Abdessalem Ben Abdelali, Abdellatif Mibaa and Elbey
Bourennane, "Towards Hardware implementation of video applications in new
telecommunications devices", Journal of Telecommunications, Volume 2, Issue
1, p75-85, April 201
Architecture and Analysis of Color Structure Descriptor for Real-Time Video Indexing and Retrieval
Abstract. Color structure descriptor (CSD) provides satisfactory image indexing and retrieval results among other color-based descriptors in MPEG-7. The superiority comes from the consideration of space distribution of pixel colors. In this paper, we proposed the first CSD hardware architecture which can generate CSD description with frame size 256 × 256 and 30 frames per second (fps). This architecture provides about 12 times speed-up than running on a 2.54 GHz microprocessor platform to achieve real-time applications like assisting rate control in video coding system and circumstance change detection in surveillance system.