10,989 research outputs found

    Practical Model-Based Diagnosis with Qualitative Possibilistic Uncertainty

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    An approach to fault isolation that exploits vastly incomplete models is presented. It relies on separate descriptions of each component behavior, together with the links between them, which enables focusing of the reasoning to the relevant part of the system. As normal observations do not need explanation, the behavior of the components is limited to anomaly propagation. Diagnostic solutions are disorders (fault modes or abnormal signatures) that are consistent with the observations, as well as abductive explanations. An ordinal representation of uncertainty based on possibility theory provides a simple exception-tolerant description of the component behaviors. We can for instance distinguish between effects that are more or less certainly present (or absent) and effects that are more or less certainly present (or absent) when a given anomaly is present. A realistic example illustrates the benefits of this approach.Comment: Appears in Proceedings of the Eleventh Conference on Uncertainty in Artificial Intelligence (UAI1995

    Testing a CMOS operational amplifier circuit using a combination of oscillation and IDDQ test methods

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    This work presents a case study, which attempts to improve the fault diagnosis and testability of the oscillation testing methodology applied to a typical two-stage CMOS operational amplifier. The proposed test method takes the advantage of good fault coverage through the use of a simple oscillation based test technique, which needs no test signal generation and combines it with quiescent supply current (IDDQ) testing to provide a fault confirmation. A built in current sensor (BICS), which introduces insignificant performance degradation of the circuit-under-test (CUT), has been utilized to monitor the power supply quiescent current changes in the CUT. The testability has also been enhanced in the testing procedure using a simple fault-injection technique. The approach is attractive for its simplicity, robustness and capability of built-in-self test (BIST) implementation. It can also be generalized to the oscillation based test structures of other CMOS analog and mixed-signal integrated circuits. The practical results and simulations confirm the functionality of the proposed test method

    Model-based reconfiguration: Diagnosis and recovery

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    We extend Reiter's general theory of model-based diagnosis to a theory of fault detection, identification, and reconfiguration (FDIR). The generality of Reiter's theory readily supports an extension in which the problem of reconfiguration is viewed as a close analog of the problem of diagnosis. Using a reconfiguration predicate 'rcfg' analogous to the abnormality predicate 'ab,' we derive a strategy for reconfiguration by transforming the corresponding strategy for diagnosis. There are two obvious benefits of this approach: algorithms for diagnosis can be exploited as algorithms for reconfiguration and we have a theoretical framework for an integrated approach to FDIR. As a first step toward realizing these benefits we show that a class of diagnosis engines can be used for reconfiguration and we discuss algorithms for integrated FDIR. We argue that integrating recovery and diagnosis is an essential next step if this technology is to be useful for practical applications

    Automatic programming methodologies for electronic hardware fault monitoring

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    This paper presents three variants of Genetic Programming (GP) approaches for intelligent online performance monitoring of electronic circuits and systems. Reliability modeling of electronic circuits can be best performed by the Stressor - susceptibility interaction model. A circuit or a system is considered to be failed once the stressor has exceeded the susceptibility limits. For on-line prediction, validated stressor vectors may be obtained by direct measurements or sensors, which after pre-processing and standardization are fed into the GP models. Empirical results are compared with artificial neural networks trained using backpropagation algorithm and classification and regression trees. The performance of the proposed method is evaluated by comparing the experiment results with the actual failure model values. The developed model reveals that GP could play an important role for future fault monitoring systems.This research was supported by the International Joint Research Grant of the IITA (Institute of Information Technology Assessment) foreign professor invitation program of the MIC (Ministry of Information and Communication), Korea

    Oscillation-based DFT for Second-order Bandpass OTA-C Filters

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    This document is the Accepted Manuscript version. Under embargo until 6 September 2018. The final publication is available at Springer via https://doi.org/10.1007/s00034-017-0648-9.This paper describes a design for testability technique for second-order bandpass operational transconductance amplifier and capacitor filters using an oscillation-based test topology. The oscillation-based test structure is a vectorless output test strategy easily extendable to built-in self-test. The proposed methodology converts filter under test into a quadrature oscillator using very simple techniques and measures the output frequency. Using feedback loops with nonlinear block, the filter-to-oscillator conversion techniques easily convert the bandpass OTA-C filter into an oscillator. With a minimum number of extra components, the proposed scheme requires a negligible area overhead. The validity of the proposed method has been verified using comparison between faulty and fault-free simulation results of Tow-Thomas and KHN OTA-C filters. Simulation results in 0.25μm CMOS technology show that the proposed oscillation-based test strategy for OTA-C filters is suitable for catastrophic and parametric faults testing and also effective in detecting single and multiple faults with high fault coverage.Peer reviewedFinal Accepted Versio

    MISSED: an environment for mixed-signal microsystem testing and diagnosis

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    A tight link between design and test data is proposed for speeding up test-pattern generation and diagnosis during mixed-signal prototype verification. Test requirements are already incorporated at the behavioral level and specified with increased detail at lower hierarchical levels. A strict distinction between generic routines and implementation data makes reuse of software possible. A testability-analysis tool and test and DFT libraries support the designer to guarantee testability. Hierarchical backtrace procedures in combination with an expert system and fault libraries assist the designer during mixed-signal chip debuggin

    Real-Time Fault Detection and Diagnosis System for Analog and Mixed-Signal Circuits of Acousto-Magnetic EAS Devices

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    © 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.The paper discusses fault diagnosis of the electronic circuit board, part of acousto-magnetic electronic article surveillance detection devices. The aim is that the end-user can run the fault diagnosis in real time using a portable FPGA-based platform so as to gain insight into the failures that have occurred.Peer reviewe

    Communication Subsystems for Emerging Wireless Technologies

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    The paper describes a multi-disciplinary design of modern communication systems. The design starts with the analysis of a system in order to define requirements on its individual components. The design exploits proper models of communication channels to adapt the systems to expected transmission conditions. Input filtering of signals both in the frequency domain and in the spatial domain is ensured by a properly designed antenna. Further signal processing (amplification and further filtering) is done by electronics circuits. Finally, signal processing techniques are applied to yield information about current properties of frequency spectrum and to distribute the transmission over free subcarrier channels

    A design for testability study on a high performance automatic gain control circuit.

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    A comprehensive testability study on a commercial automatic gain control circuit is presented which aims to identify design for testability (DfT) modifications to both reduce production test cost and improve test quality. A fault simulation strategy based on layout extracted faults has been used to support the study. The paper proposes a number of DfT modifications at the layout, schematic and system levels together with testability. Guidelines that may well have generic applicability. Proposals for using the modifications to achieve partial self test are made and estimates of achieved fault coverage and quality levels presente

    Identification of Circuit Parameters for the Specified or Measured Performances

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    The original method of analog circuit parameter identification for the specified design performances is described. These parameters are designated by means of PSpice simulation of the adjoint circuit to the original one. In this adjoint circuit, elements of the original circuit, described by the sized parameters, are replaced by controlled sources. Each such source is controlled by the differential voltage or current, difference between the calculated voltage or current and the specified one, with infinitely large gain. The method is applicable to both linear and nonlinear DC circuits and AC circuits and can be used in many fields of analog circuit design, such as: finding of acceptability region, analog fault diagnosis, postproduction identification and tuning. In the later cases, design performances are replaced by measurements of Circuit Under Test (CUT). Simplicity, extremely low computational complexity and high accuracy are the main benefits of the proposed, basic Circuit Theory based, approach – the solution is found after a single PSpice simulation.  For better understanding of the presented methodology, four practical examples are discussed
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