An N-Path Filter with Multiphase PWM Clocks for Harmonic Response Suppression

A switched-capacitor N-path circuit can be employed for filtering an RF signal, as well as a passive downconverter. A known limitation of an N-path filter is that in addition to downconverting signals around the desired center frequency, the circuit also downconverts signals located around harmonics of the center frequency. An N-path filter that uses a PWM representation of a sinusoidal LO to mitigate harmonic downconversion is proposed in this work. Single-edge natural sampling pulse-width modulated (PWM) clocks are used to drive the switches in the N-path filter. The potential for employing PWM for providing gain control is also described

A N-Path Receiver With Harmonic Response Suppression

A downconversion receiver employing a switch-based N-path filter with reduced harmonic response around the third- and fifth- LO harmonics is presented. The N-path filter is placed in a frequency-translation feedback loop that is effective at the 3rd and the 5th LO harmonics to mitigate harmonic downconversion. A pulse-width-modulated LO (PWM-LO) clocking scheme is used in the feedback upconverter to reduce the noise injected around the LO harmonic at the input of N-path downconverter. The compression resulting from blockers around the 3rd and the 5th LO harmonics is also suppressed as a result of reduced harmonic response. Compensation of peak frequency shift of the N-path response due to parasitic input capacitance is also described.Comment: 5 pages, 8 figure