Development of FPGA based control architecture for PMSM drives

University of Technology Sydney. Faculty of Engineering and Information Technology.The rapid advancement of the very large scale integration (VLSI) technology and electronic design automation techniques in recent years has made a significant impact on the development of complex and compact high performance control architecture for industrial motion systems. Specific hardware with the field programmable gate array (FPGA) technology is now considered as a promising solution in order to make use of the reliability and versatility of controllers. Indeed, FPGAs have been successfully used in many control applications such as power converter control and electrical machines control. This is because such an FPGA-based implementation can offer an effective reprogrammable capability and overcome disadvantages of microprocessor-based or digital signal processor-based embedded systems. This thesis aims to provide a proof-of-concept for the control-system-on-chip and a prototype for a fully-implemented FPGA control architecture for permanent magnet synchronous motor (PMSM) drives. In this thesis, a special focus is given on analytical effects, design procedure, and control performance enhancement for PMSM drives under sensor/sensorless vector control using a number of control techniques. The control schemes include FPGA-based intelligent control and robust cascade control for single axis and multiple axis tracking with PMSMs. An important contribution of this thesis rests with a convincing demonstration of high performance estimation schemes, using sliding mode observers and extended Kalman filters, in terms of accuracy and robustness against noisy and/or perturbed currents for sensorless PMSM control based on the FPGA technology. In addition, a sequential finite state machine is developed in this work to result in less logic gate resources, leading to a faster processing time. Significance of this thesis contribution includes in providing a feasible and effective solution for the implementation of complex control strategies to fully exploit the FPGA advantages in power electronics and drive applications

A modified model for the Lobula Giant Movement Detector and its FPGA implementation

The Lobula Giant Movement Detector (LGMD) is a wide-field visual neuron located in the Lobula layer of the Locust nervous system. The LGMD increases its firing rate in response to both the velocity of an approaching object and the proximity of this object. It has been found that it can respond to looming stimuli very quickly and trigger avoidance reactions. It has been successfully applied in visual collision avoidance systems for vehicles and robots. This paper introduces a modified neural model for LGMD that provides additional depth direction information for the movement. The proposed model retains the simplicity of the previous model by adding only a few new cells. It has been simplified and implemented on a Field Programmable Gate Array (FPGA), taking advantage of the inherent parallelism exhibited by the LGMD, and tested on real-time video streams. Experimental results demonstrate the effectiveness as a fast motion detector

NeuroPod: a real-time neuromorphic spiking CPG applied to robotics

Initially, robots were developed with the aim of making our life easier, carrying out repetitive or dangerous tasks for humans. Although they were able to perform these tasks, the latest generation of robots are being designed to take a step further, by performing more complex tasks that have been carried out by smart animals or humans up to date. To this end, inspiration needs to be taken from biological examples. For instance, insects are able to optimally solve complex environment navigation problems, and many researchers have started to mimic how these insects behave. Recent interest in neuromorphic engineering has motivated us to present a real-time, neuromorphic, spike-based Central Pattern Generator of application in neurorobotics, using an arthropod-like robot. A Spiking Neural Network was designed and implemented on SpiNNaker. The network models a complex, online-change capable Central Pattern Generator which generates three gaits for a hexapod robot locomotion. Recon gurable hardware was used to manage both the motors of the robot and the real-time communication interface with the Spiking Neural Networks. Real-time measurements con rm the simulation results, and locomotion tests show that NeuroPod can perform the gaits without any balance loss or added delay.Ministerio de Economía y Competitividad TEC2016-77785-

A field programmable gate array based modular motion control platform

The expectations from motion control systems have been rising day by day. As the systems become more complex, conventional motion control systems can not achieve to meet all the specifications with optimized results. This creates the necessity of fundamental changes in the infrastructure of the system. Field programmable gate array (FPGA) technology enables the reconfiguration of the digital hardware, thus dissolving the necessity of infrastructural changes for minor manipulations in the hardware even if the system is deployed. An FPGA based hardware system shrinks the size of the hardware hence the cost. FPGAs also provide better power ratings for the systems as well as a more reliable system with improved performance. As a trade off, the development is rather more difficult than software based systems, which also affects the research and development time of the overall system. In this paper a level of abstraction is introduced in order to diminish the requirement of advanced hardware description language (HDL) knowledge for implementing motion control systems thoroughly on an FPGA. The intellectual property library consists of synthesizable hardware modules specifically implemented for motion control purposes. Other parts of a motion control system, like user interface and trajectory generation, are implemented as software functions in order to protect the modularity of the system. There are also several external hardware designs for interfacing and driving various types of actuators

Evaluation of Single-Chip, Real-Time Tomographic Data Processing on FPGA - SoC Devices

A novel approach to tomographic data processing has been developed and evaluated using the Jagiellonian PET (J-PET) scanner as an example. We propose a system in which there is no need for powerful, local to the scanner processing facility, capable to reconstruct images on the fly. Instead we introduce a Field Programmable Gate Array (FPGA) System-on-Chip (SoC) platform connected directly to data streams coming from the scanner, which can perform event building, filtering, coincidence search and Region-Of-Response (ROR) reconstruction by the programmable logic and visualization by the integrated processors. The platform significantly reduces data volume converting raw data to a list-mode representation, while generating visualization on the fly.Comment: IEEE Transactions on Medical Imaging, 17 May 201

Computer vision based two-wheel self-balancing Rover featuring Arduino and Raspberry Pi

Holistic control system for a self-balancing robot with two wheels with several functionalities added to it, such as remote terminal control, and computer vision based algorithms