An Efficient Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Switching Reduction

<p>Abstract</p> <p>This paper presents a bus coding methodology for the instruction memory data bus switching reduction. Compared to the existing state-of-the-art multiway partial bus-invert (MPBI) coding which relies on data bit correlation, our approach is very effective in reducing the switching activity of the instruction data buses, since little bit correlation can be observed in the instruction data. Our experiments demonstrate that the proposed encoding can reduce up to 42% of switching activity, with an average of 30% reduction, while MPBI achieves just 17.6% reduction in switching activity.</p

Research Article An Efficient Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Switching Reduction

This paper presents a bus coding methodology for the instruction memory data bus switching reduction. Compared to the existing state-of-the-art multiway partial bus-invert (MPBI) coding which relies on data bit correlation, our approach is very effective in reducing the switching activity of the instruction data buses, since little bit correlation can be observed in the instruction data. Our experiments demonstrate that the proposed encoding can reduce up to 42 % of switching activity, with an average of 30% reduction, while MPBI achieves just 17.6 % reduction in switching activity. Copyright © 2009 J. Gu and H. Guo. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. 1