Hardware Trust and Assurance through Reverse Engineering: A Survey and Outlook from Image Analysis and Machine Learning Perspectives

In the context of hardware trust and assurance, reverse engineering has been often considered as an illegal action. Generally speaking, reverse engineering aims to retrieve information from a product, i.e., integrated circuits (ICs) and printed circuit boards (PCBs) in hardware security-related scenarios, in the hope of understanding the functionality of the device and determining its constituent components. Hence, it can raise serious issues concerning Intellectual Property (IP) infringement, the (in)effectiveness of security-related measures, and even new opportunities for injecting hardware Trojans. Ironically, reverse engineering can enable IP owners to verify and validate the design. Nevertheless, this cannot be achieved without overcoming numerous obstacles that limit successful outcomes of the reverse engineering process. This paper surveys these challenges from two complementary perspectives: image processing and machine learning. These two fields of study form a firm basis for the enhancement of efficiency and accuracy of reverse engineering processes for both PCBs and ICs. In summary, therefore, this paper presents a roadmap indicating clearly the actions to be taken to fulfill hardware trust and assurance objectives.Comment: It is essential not to reduce the size of the figures as high quality ones are required to discuss the image processing algorithms and method

Physical Unclonable Functions for Authenticating and Preventing Reverse Engineering of Integrated Circuits and Electronics Hardware

Electronics hardware is subject to a number of potential threats such as reverse engineering and counterfeiting. As a result, hardware authentication mechanisms and anti-reverse engineering techniques such as obfuscation and tamper-resistance are essential. In this thesis, we will present methods to approach these problems, and the primary research contributions of this thesis are a Low pass filter PUF for the authentication of PCBs and ICs; Key generation for hardware obfuscation using strong PUFs; and Session key generation using strong PUF modeling. Physical Unclonable Functions (PUFs) are probabilistic circuit primitives that extract randomness from the physical characteristics of a device. In this work, we propose a novel PUF design based on resistor and capacitor variations for low pass filters (LoPUF). We extract the process variations present at the output of the filter with the use of an inverter to digitize the output and a counter to measure output pulse widths. We have created a process to select RC pairs that can be used to reliably generate authentication IDs. The LoPUF has been evaluated in the context of both printed circuit boards and integrated circuits. As a result of the increased use of contract foundries, IP theft, excess production and reverse engineering are major concerns for the electronics and defense industries. Hardware obfuscation and IP locking can be used to make a design secure by replacing a part of the circuit with a key-locked module. In order to ensure each chip has unique keys, we propose a strong PUF-based hardware obfuscation scheme to uniquely lock each chip that is less area intensive than previous work. Communication with embedded systems can be problematic because they are limited in their capability to implement public key encryption and client-side authentication. In this work, we introduce a session key generation mechanism using PUFs. We propose a novel dynamic key generation method that depends on the ability to model certain PUF circuits using machine learning algorithms. Our proposed method also mitigates tampering attacks as no information is stored between subsequent keys. We have shown the effectiveness of our method with error-correcting capability to keep the outputs of the PUF from noise