17,646 research outputs found
Exact and practical pattern matching for quantum circuit optimization
Quantum computations are typically compiled into a circuit of basic quantum
gates. Just like for classical circuits, a quantum compiler should optimize the
quantum circuit, e.g. by minimizing the number of required gates. Optimizing
quantum circuits is not only relevant for improving the runtime of quantum
algorithms in the long term, but is also particularly important for near-term
quantum devices that can only implement a small number of quantum gates before
noise renders the computation useless. An important building block for many
quantum circuit optimization techniques is pattern matching, where given a
large and a small quantum circuit, we are interested in finding all maximal
matches of the small circuit, called pattern, in the large circuit, considering
pairwise commutation of quantum gates.
In this work, we present a classical algorithm for pattern matching that
provably finds all maximal matches in time polynomial in the circuit size (for
a fixed pattern size). Our algorithm works for both quantum and reversible
classical circuits. We demonstrate numerically that our algorithm, implemented
in the open-source library Qiskit, scales considerably better than suggested by
the theoretical worst-case complexity and is practical to use for circuit sizes
typical for near-term quantum devices. Using our pattern matching algorithm as
the basis for known circuit optimization techniques such as template matching
and peephole optimization, we demonstrate a significant (~30%) reduction in
gate count for random quantum circuits, and are able to further improve
practically relevant quantum circuits that were already optimized with
state-of-the-art techniques.Comment: Raban Iten and Romain Moyard contributed equally to this work. Major
updates: Added numerical analysis of the pattern matching algorithm; fixed
two special cases that were missed by our algorithm and updated the
worst-case complexity analysis. 10 pages summary + 23 pages main text + 7
pages appendi
Techniques for the Synthesis of Reversible Toffoli Networks
This paper presents novel techniques for the synthesis of reversible networks
of Toffoli gates, as well as improvements to previous methods. Gate count and
technology oriented cost metrics are used. Our synthesis techniques are
independent of the cost metrics. Two new iterative synthesis procedure
employing Reed-Muller spectra are introduced and shown to complement earlier
synthesis approaches. The template simplification suggested in earlier work is
enhanced through introduction of a faster and more efficient template
application algorithm, updated (shorter) classification of the templates, and
presentation of the new templates of sizes 7 and 9. A novel ``resynthesis''
approach is introduced wherein a sequence of gates is chosen from a network,
and the reversible specification it realizes is resynthesized as an independent
problem in hopes of reducing the network cost. Empirical results are presented
to show that the methods are effective both in terms of the realization of all
3x3 reversible functions and larger reversible benchmark specifications.Comment: 20 pages, 5 figure
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