Longer Wavelength GaAs-Based VCSELs for Extended-Reach Optical Interconnects

Data centers of today are increasing in size and are built to accommodate strong traffic demands while providing sustainably by having clients sharing resources under one roof. Their massive scale puts pressure on the server network topology and has incited a need for data transmission links that are energy efficient and capable of operation at high bit rates with reach up to a few kilometers. Optical interconnects (OIs) offer large bandwidth and low attenuation at long distances, and are therefore suitable for this task. The most commonly used OIs, with 850 nm GaAs-based vertical-cavity surface-emitting lasers (VCSELs) and multi-mode fiber (MMF), have a 25 Gb/s reach that is limited to a few hundred meters. However, the fiber chromatic dispersion and attenuation that limit the OI reach can be reduced significantly by increasing the wavelength of this very same technology. The upper limit of the GaAs-based VCSEL technology, with strained InGaAs quantum wells (QWs), is about 1100 nm.With further improved OI performance, new hyperscale data center topologies can be realized and explored. This will lead to a larger number of possible solutions in traffic engineering as well as for power management. 1060 nm VCSELs could soon open up for lane rates of 100+ Gb/s over distances up to 2 km and help reach the Tb/s link speed aim of data center OI standards, in which capacity is built up mainly by employing multiple parallel lanes, increasing symbol rate by going from binary to four-level pulse amplitude modulation (PAM-4), and optimizing with electrical mitigation techniques such as digital signal processing.In this work we show that 1060 nm GaAs VCSELs are suitable light sources for long-reach OIs by first demonstrating their overall stable performance and capability of error-free data transmission up to 50 Gb/s back-to-back and 25 Gb/s over 1 km of MMF. With PAM-4, we show 100 Gb/s error-free capability over 100 m of MMF, suitable for wavelength division multiplexed OIs that can transmit data at several wavelengths from 850 to 1060 nm over the same fiber channel. We also assemble single-mode 1060 nm VCSEL and single-mode fiber links and demonstrate 50 Gb/s error-free transmission over 1 km using pre-emphasis and 40 Gb/s over 2 km without the use of any electrical mitigation techniques. These results stem from careful VCSEL design, including strained InGaAs QWs with GaAsP barriers, doped AlGaAs distributed Bragg reflectors, a short optical cavity and multiple oxide layers. In addition, we show that the fabrication of such a device poses no increase in complexity and can be realized using standard processing techniques

Research and design of high-speed advanced analogue front-ends for fibre-optic transmission systems

In the last decade, we have witnessed the emergence of large, warehouse-scale data centres which have enabled new internet-based software applications such as cloud computing, search engines, social media, e-government etc. Such data centres consist of large collections of servers interconnected using short-reach (reach up to a few hundred meters) optical interconnect. Today, transceivers for these applications achieve up to 100Gb/s by multiplexing 10x 10Gb/s or 4x 25Gb/s channels. In the near future however, data centre operators have expressed a need for optical links which can support 400Gb/s up to 1Tb/s. The crucial challenge is to achieve this in the same footprint (same transceiver module) and with similar power consumption as today’s technology. Straightforward scaling of the currently used space or wavelength division multiplexing may be difficult to achieve: indeed a 1Tb/s transceiver would require integration of 40 VCSELs (vertical cavity surface emitting laser diode, widely used for short‐reach optical interconnect), 40 photodiodes and the electronics operating at 25Gb/s in the same module as today’s 100Gb/s transceiver. Pushing the bit rate on such links beyond today’s commercially available 100Gb/s/fibre will require new generations of VCSELs and their driver and receiver electronics. This work looks into a number of state‐of-the-art technologies and investigates their performance restraints and recommends different set of designs, specifically targeting multilevel modulation formats. Several methods to extend the bandwidth using deep submicron (65nm and 28nm) CMOS technology are explored in this work, while also maintaining a focus upon reducing power consumption and chip area. The techniques used were pre-emphasis in rising and falling edges of the signal and bandwidth extensions by inductive peaking and different local feedback techniques. These techniques have been applied to a transmitter and receiver developed for advanced modulation formats such as PAM-4 (4 level pulse amplitude modulation). Such modulation format can increase the throughput per individual channel, which helps to overcome the challenges mentioned above to realize 400Gb/s to 1Tb/s transceivers

Design of Multi-Gigabit Network Interconnect Elements and Protocols for a Data Acquisition System in Radiation Environments

Modern High Energy Physics experiments (HEP) explore the fundamental nature of matter in more depth than ever before and thereby benefit greatly from the advances in the field of communication technology. The huge data volumes generated by the increasingly precise detector setups pose severe problems for the Data Acquisition Systems (DAQ), which are used to process and store this information. In addition, detector setups and their read-out electronics need to be synchronized precisely to allow a later correlation of experiment events accurately in time. Moreover, the substantial presence of charged particles from accelerator-generated beams results in strong ionizing radiation levels, which has a severe impact on the electronic systems. This thesis recommends an architecture for unified network protocol IP cores with custom developed physical interfaces for the use of reliable data acquisition systems in strong radiation environments. Special configured serial bidirectional point-to-point interconnects are proposed to realize high speed data transmission, slow control access, synchronization and global clock distribution on unified links to reduce costs and to gain compact and efficient read-out setups. Special features are the developed radiation hardened functional units against single and multiple bit upsets, and the common interface for statistical error and diagnosis information, which integrates well into the protocol capabilities and eases the error handling in large experiment setups. Many innovative designs for several custom FPGA and ASIC platforms have been implemented and are described in detail. Special focus is placed on the physical layers and network interface elements from high-speed serial LVDS interconnects up to 20 Gb/s SSTL links in state-of-the-art process technology. The developed IP cores are fully tested by an adapted verification environment for electronic design automation tools and also by live application. They are available in a global repository allowing a broad usage within further HEP experiments