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Neuromorphic In-Memory Computing Framework using Memtransistor Cross-bar based Support Vector Machines
This paper presents a novel framework for designing support vector machines
(SVMs), which does not impose restriction on the SVM kernel to be
positive-definite and allows the user to define memory constraint in terms of
fixed template vectors. This makes the framework scalable and enables its
implementation for low-power, high-density and memory constrained embedded
application. An efficient hardware implementation of the same is also
discussed, which utilizes novel low power memtransistor based cross-bar
architecture, and is robust to device mismatch and randomness. We used
memtransistor measurement data, and showed that the designed SVMs can achieve
classification accuracy comparable to traditional SVMs on both synthetic and
real-world benchmark datasets. This framework would be beneficial for design of
SVM based wake-up systems for internet of things (IoTs) and edge devices where
memtransistors can be used to optimize system's energy-efficiency and perform
in-memory matrix-vector multiplication (MVM).Comment: 4 pages, 5 figures, MWSCAS 201
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