Improved Quantum Cost for n-bit Toffoli Gates

We present an n-bit Toffoli gate quantum circuit based on the realization proposed by Barenco, where some of the Toffoli gates in their construction are replaced with Peres gates. This results in a significant cost reduction. Our main contribution is a quantum circuit which simulates the (m+1)-bit Toffoli gate with 32m-96 elementary quantum gates and one garbage bit which is passed unchanged. This paper is a corrected and expanded version of our recent journal publication

Quantum Cost Optimization for Reversible Sequential Circuit

Reversible sequential circuits are going to be the significant memory blocks for the forthcoming computing devices for their ultra low power consumption. Therefore design of various types of latches has been considered a major objective for the researchers quite a long time. In this paper we proposed efficient design of reversible sequential circuits that are optimized in terms of quantum cost, delay and garbage outputs. For this we proposed a new 3*3 reversible gate called SAM gate and we then design efficient sequential circuits using SAM gate along with some of the basic reversible logic gates.Comment: Quantum 4.12 (2013). arXiv admin note: substantial text overlap with arXiv:1312.735