A Supervisory Control Algorithm Based on Property-Directed Reachability

We present an algorithm for synthesising a controller (supervisor) for a discrete event system (DES) based on the property-directed reachability (PDR) model checking algorithm. The discrete event systems framework is useful in both software, automation and manufacturing, as problems from those domains can be modelled as discrete supervisory control problems. As a formal framework, DES is also similar to domains for which the field of formal methods for computer science has developed techniques and tools. In this paper, we attempt to marry the two by adapting PDR to the problem of controller synthesis. The resulting algorithm takes as input a transition system with forbidden states and uncontrollable transitions, and synthesises a safe and minimally-restrictive controller, correct-by-design. We also present an implementation along with experimental results, showing that the algorithm has potential as a part of the solution to the greater effort of formal supervisory controller synthesis and verification.Comment: 16 pages; presented at Haifa Verification Conference 2017, the final publication is available at Springer via https://doi.org/10.1007/978-3-319-70389-3_

Test Derivation from Timed Automata

A real-time system is a discrete system whose state changes occur in real-numbered time [AH97]. For testing real-time systems, specification languages must be extended with constructs for expressing real-time constraints, the implementation relation must be generalized to consider the temporal dimension, and the data structures and algorithms used to generate tests must be revised to operate on a potentially infinite set of states

Symbolic Computation of Nonblocking Control Function for Timed Discrete Event Systems

In this paper, we symbolically compute a minimally restrictive nonblocking supervisor for timed discrete event systems, in the supervisory control theory context. The method is based on Timed Extended Finite Automata, which is an augmentation of extended finite automata (EFAs) by incorporating discrete time into the model. EFAs are ordinary automaton extended with discrete variables, guard expressions and action functions. To tackle large problems all computations are based on binary decision diagrams (BDDs). The main feature of this approach is that the BDD-based fixed-point computations is not based on “tick” models that have been commonly used in this area, leading to better performance in many cases. As a case study, we effectively computed the minimally restrictive nonblocking supervisor for a well-known production cell

Symbolic reachability computation using the disjunctive partitioning technique in Supervisory Control Theory

Supervisory Control Theory (SCT) is a model-based framework for automatically synthesizing a supervisor that minimally restricts the behavior of a plant such that a given specification is fulfilled. A problem, which prevents SCT from having a major breakthrough industrially, is that the supervisory synthesis often suffers from the state-space explosion problem. To alleviate this problem, a well-known strategy is to represent and explore the state-space symbolically by using Binary Decision Diagrams. Based on this principle, an efficient symbolic state-space traversal approach, depending on the disjunctive partitioning technique, is presented and the correctness of it is proved. Finally, the efficiency of the presented approach is demonstrated on a set of benchmark examples