A Smart Imager for the Vision Processing Front-End

Abstract-- A CMOS PWM imager which realizes block summation and 2D projection of a thresholded image, in addition to rowparallel PWM readout with gray scale, is reported. An imager including 56 x 56 pixels, an address signal generator, and a signal processing circuit is fabricated in a 6mm x 6mm chip with a 0.8µm CMOS technology. I