3 research outputs found
Using Rapid Prototyping in Computer Architecture Design Laboratories
This paper describes the undergraduate computer architecture courses and laboratories introduced at Georgia Tech during the past two years. A core sequence of six required courses for computer engineering students has been developed. In this paper, emphasis is placed upon the new core laboratories which utilize commercial CAD tools, FPGAs, hardware emulators, and a VHDL based rapid prototyping approach to simulate, synthesize, and implement prototype computer hardware
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Register spilling in a compiler for architectures with multiple identical functional units
A good code generator must effectively utilize the registers provided by the target architecture. Although a number of register allocation techniques exist, few address the issues involved in multiple register banks and no known techniques exist for effectively using register banks of the same type that are associated with multiple identical functional units. This research presents a register allocation technique which allows values in registers to be spilled between register banks of the same type that are associated with identical functional units. Inter-bank spilling is accomplished by postponing the determination of spill locations until all other register allocation is performed. At that point, any available registers can be used to hold spilled values. Using these techniques significantly improves the generated code for architectures with many register banks and functional units