FPGA implementation of a 32x32 autocorrelator array for analysis of fast image series

With the evolving technology in CMOS integration, new classes of 2D-imaging detectors have recently become available. In particular, single photon avalanche diode (SPAD) arrays allow detection of single photons at high acquisition rates (\geq 100 kfps), which is about two orders of magnitude higher than with currently available cameras. Here we demonstrate the use of a SPAD array for imaging fluorescence correlation spectroscopy (imFCS), a tool to create 2D maps of the dynamics of fluorescent molecules inside living cells. Time-dependent fluorescence fluctuations, due to fluorophores entering and leaving the observed pixels, are evaluated by means of autocorrelation analysis. The multi-{\tau} correlation algorithm is an appropriate choice, as it does not rely on the full data set to be held in memory. Thus, this algorithm can be efficiently implemented in custom logic. We describe a new implementation for massively parallel multi-{\tau} correlation hardware. Our current implementation can calculate 1024 correlation functions at a resolution of 10{\mu}s in real-time and therefore correlate real-time image streams from high speed single photon cameras with thousands of pixels.Comment: 10 pages, 7 figure

Fault-Tolerant Logical Gate Networks for CSS Codes

Fault-tolerant logical operations for qubits encoded by CSS codes are discussed, with emphasis on methods that apply to codes of high rate, encoding k qubits per block with k>1. It is shown that the logical qubits within a given block can be prepared by a single recovery operation in any state whose stabilizer generator separates into X and Z parts. Optimized methods to move logical qubits around and to achieve controlled-not and Toffoli gates are discussed. It is found that the number of time-steps required to complete a fault-tolerant quantum computation is the same when k>1 as when k=1.Comment: 13 pages, 16 figures. The material in the appendix was included in a previous quant-ph eprint, but not yet published; it has been corrected and clarified. The rest is new. Replacement version: various small corrections and clarification

Optimization of Supersingular Isogeny Cryptography for Deeply Embedded Systems

Public-key cryptography in use today can be broken by a quantum computer with sufficient resources. Microsoft Research has published an open-source library of quantum-secure supersingular isogeny (SI) algorithms including Diffie-Hellman key agreement and key encapsulation in portable C and optimized x86 and x64 implementations. For our research, we modified this library to target a deeply-embedded processor with instruction set extensions and a finite-field coprocessor originally designed to accelerate traditional elliptic curve cryptography (ECC). We observed a 6.3-7.5x improvement over a portable C implementation using instruction set extensions and a further 6.0-6.1x improvement with the addition of the coprocessor. Modification of the coprocessor to a wider datapath further increased performance 2.6-2.9x. Our results show that current traditional ECC implementations can be easily refactored to use supersingular elliptic curve arithmetic and achieve post-quantum security