A Portable and Extendible Testbed for Distributed Logic Simulation

A flexible test environment is presented that allows for different methods of parallelizing discrete event simulation to be evaluated in a uniform environment. The testbed is portable and can be easily extended in order to analyze new parallelization methods. Runtime measurements performed on the iPSC distributed memory multiprocessors show efficiencies of up to 50 percent for both conservative and optimistic synchronization. 1 Introduction In recent years, simulation has become an indispensable tool in VLSI design. As system complexity increases, simulation is used not only for validation purposes but also helps to design system hardware and software in parallel and to evaluate performance of different design alternatives. Sequential computers no longer can cope with the increasing demand for computational power that emerges from the desire for more comprehensive simulation of increasingly complex systems. Currently, parallel simulation run on general-purpose multiprocessors is the m..