132 research outputs found

    Current-Controlled Current-Mode Universal Biquad Employing Multi-Output Transconductors

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    This paper deals with RC active biquad working in the so-called current mode (CM). The design approach uses only three transconductors (OTA) with the minimum necessary number of outputs and with only three passive grounded elements. The proposed filter has simple circuit configuration providing all standard transfer functions such as high-pass (HP), band-pass (BP), low-pass (LP), band-reject (BR) and all-pass (AP). Electronic tuning and independent adjusting of the quality factor and bandwidth of BP filter is possible. The presented circuits are verified by PSpice simulations utilizing OTAs on transistor level of abstraction. The linear parasitic effects of the real active elements in each suggested circuit are briefly discussed. Experimental verification is also given. Designed networks can be used in many applications such as antialiasing filters, in high-speed data telecommunication systems, for signal processing in the cable modems, in regulation and measurement techniques etc

    Polyphase filter with parametric tuning

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    Tese de mestrado integrado. Engenharia Electrotécnica e de Computadores. Faculdade de Engenharia. Universidade do Porto. 201

    ON DESIGN OF SELF-TUNING ACTIVE FILTERS

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    In this paper, we present one approach in design of self-tuning all-pass, band-pass, low-pass and notch filters based on phase control loops with voltage-controlled active components and analyze their stability as well. The main idea is to vary signal delay of the filter and in this way to achieve phase correction. The filter phase characteristics are tuned by varying the transconductance of the operational transconductance amplifier or capacitance of an MOS varicap element, which are the constituents of filters. This approach allows us to implement active filters with capacitance values of order of pF, making the complete filter circuit to be amenable for realization in CMOS technology. The phase control loops are characterized by good controllable delay over the full range of phase and frequency regulation, high stability, and short settling (locking) time. The proposed circuits are suitable for implementation as a basic building RF function block, used in phase and frequency regulation, frequency synthesis, clock generation recovery, filtering, selective amplifying etc

    A wide dynamic range high-q high-frequency bandpass filter with an automatic quality factor tuning scheme

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    An 80 MHz bandpass filter with a tunable quality factor of 16∼44 using an improved transconductor circuit is presented. A noise optimized biquad structure for high-Q, high- frequency bandpass filter is proposed. The quality factor of the filter is tuned using a new quality factor locked loop algorithm. It was shown that a second-order quality factor locked loop is necessary and sufficient to tune the quality factor of a bandpass filter with zero steady state error. The accuracy, mismatch, and sensitivty analysis of the new tuning scheme was performed and analyzed. Based on the proposed noise optimized filter structure and new quality factor tuning scheme, a biquad filter was designed and fabricated in 0.25 μm BiCMOS process. The measured results show that the biquad filter achieves a SNR of 45 dB at IMD of 40 dB. The P-1dB compression point and IIP3 of the filter are -10 dBm and -2.68 dBm, respectively. The proposed biquad filter and quality factor tuning scheme consumes 58mW and 13 mW of power at 3.3 V supply.Ph.D.Committee Chair: Allen Phillip; Committee Member: Hasler Paul; Committee Member: Keezer David; Committee Member: Kenny James; Committee Member: Pan Ronghu

    Nonlinearity and noise modeling of operational transconductance amplifiers for continuous time analog filters

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    A general framework for performance optimization of continuous-time OTA-C (Operational Transconductance Amplifier-Capacitor) filters is proposed. Efficient procedures for evaluating nonlinear distortion and noise valid for any filter of arbitrary order are developed based on the matrix description of a general OTA-C filter model . Since these procedures use OTA macromodels, they can be used to obtain the results significantly faster than transistor-level simulation. In the case of transient analysis, the speed-up may be as much as three orders of magnitude without almost no loss of accuracy. This makes it possible to carry out direct numerical optimization of OTA-C filters with respect to important characteristics such as noise performance, THD, IM3, DR or SNR. On the other hand, the general OTA-C filter model allows us to apply matrix transforms that manipulate (rescale) filter element values and/or change topology without changing its transfer function. The above features are a basis to build automated optimization procedures for OTA-C filters. In particular, a systematic optimization procedure using equivalence transformations is proposed. The research also proposes suitable software implementations of the optimization process. The first part of the research proposes a general performance optimization procedure and to verify the process two application type examples are mentioned. An application example of the proposed approach to optimal block sequencing and gain distribution of 8th order cascade Butterworth filter (for two variants of OTA topologies) is given. Secondly the modeling tool is used to select the best suitable topology for a 5th order Bessel Low Pass Filter. Theoretical results are verified by comparing to transistor-level simulation withCADENCE. For the purpose of verification, the filters have also been fabricated in standard 0.5mm CMOS process. The second part of the research proposes a new linearization technique to improve the linearity of an OTA using an Active Error Feedforward technique. Most present day applications require very high linear circuits combined with low noise and low power consumption. An OTA based biquad filter has also been fabricated in 0.35mm CMOS process. The measurement results for the filter and the stand alone OTA have been discussed. The research focuses on these issues

    Automatic tuning of continuous-time filters

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    Integrated high-Q continuous-time filters require adaptive tuning circuits that will correct the filter parameters such as center frequency and quality factor (Q). Three different automatic tuning techniques are introduced. In all of the proposed methods, frequencyand quality factor tuning loops are controlled digitally, providing stable tuning by activating only one loop at a given time. In addition, a direct relationship between passband gain and quality factor is not required, so the techniques can be applied to active LC filters as well as Gm-C filters. The digital-tuning method based on phase comparison was verified with 1% tuning accuracy at 5.5 MHz for Q of 20. It uses phase information for both Q and center-frequency tuning. The filter output phase is tuned to the known references, which are generated by a frequency synthesizer. The core tuning circuit consists of D flip-flops (DFF) and simple logic gates. DFFs are utilized to perform binary phase comparisons. The second method, high-order digital tuning based on phase comparison, is an extension of the previous technique to high-order analog filters without depending on the master-slave approach. Direct tuning of the overall filter response is achieved without separating individual biquad sections, eliminating switches and their parasitics. The tuning system was verified with a prototype 6th order bandpass filter at 19 MHz with 0.6 MHz bandwidth, which was fabricated in a conventional 0.5 [mu]m CMOS technology. Analysis of different practical limitations is also provided. Finally, the digital-tuning method based on magnitude comparison is proposed for second-order filters for higher frequency operations. It incorporates a frequency synthesizer to generate reference signals, an envelope detector and a switched comparator to compare output magnitudes at three reference frequencies. The theoretical analysis of the technique and the simulation results are provided

    Analogue CMOS Cochlea Systems: A Historic Retrospective

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    Low power architecture and circuit techniques for high boost wideband Gm-C filters

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    With the current trend towards integration and higher data rates, read channel design needs to incorporate significant boost for a wider signal bandwidth. This dissertation explores the analog design problems associated with design of such 'Equalizing Filter' (boost filter) for read channel applications. Specifically, a 330MHz, 5th order Gm-C continuous time lowpass filter with 24dB boost is designed. Existing architectures are found to be unsuitable for low power, wideband and high boost operation. The proposed solution realizes boosting zeros by efficiently combining available transfer functions associated with all nodes of cascaded biquad cells. Further, circuit techniques suitable for high frequency filter design are elaborated such as: application of the Gilbert cell as a variable transconductor and a new Common-Mode-Feedback (CMFB) error amplifier that improves common mode accuracy without compromising on bandwidth or circuit complexity. A prototype is fabricated in a standard 0.35mm CMOS process. Experimental results show -41dB of IM3 for 250mV peak to peak swing with 8.6mW/pole of power dissipation

    An analog approach to interference suppression in ultra-wideband receivers

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    Because of the huge bandwidth of Ultra-Wideband (UWB) systems, in-band narrowband interference may hinder receiver performance. In this dissertation, sources of potential narrowband interference that lie within the IEEE 802.15.3a UWB bandwidth are presented, and a solution is proposed. To combat interference in Multi-Band OFDM (MB-OFDM) UWB systems, an analog notch filter is designed to be included in the UWB receive chain. The architecture of the filter is based on feed-forward subtraction of the interference, and includes a Least Means Squared (LMS) tuning scheme to maximize attenuation. The filter uses the Fast Fourier Transform (FFT) result for interference detection and discrete center frequency tuning of the filter. It was fabricated in a 0.18 õm process, and experimental results are provided. This is the first study of potential in-band interference sources for UWB. The proposed filter offers a practical means for ensuring reliable UWB communication in the presense of such interference. The Operational Transconductance Amplifier (OTA) is the predominant building block in the design of the notch filter. In many cases, OTAs must handle input signals with large common mode swings. A new scheme for achieving rail-to-rail input to an OTA is introduced. Constant gm is obtained by using tunable level shifters and a single differential pair. Feedback circuitry controls the level shifters in a manner that fixes the common mode input of the differential pair, resulting in consistent and stable operation for rail-to-rail inputs. As the new technique avoids using complimentary input differential pairs, this method overcomes problems such as Common Mode Rejection Ratio (CMRR) and Gain Bandwidth (GBW) product degradation that exist in many other designs. The circuit was fabricated in a 0.5õm process. The resulting differential pair had a constant transconductance that varied by only ñ0.35% for rail-to-rail input common mode levels. The input common mode range extended well past the supply levels of ñ1.5V, resulting in only ñ1% fluctuation in gm for input common modes from -2V to 2V
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