An Ultra-High Speed Emulator Dedicated to Power System Dynamics Computation Based on a Mixed-Signal Hardware Platform

This paper presents an ultra-high speed hardware platform dedicated to power system dynamic (small signal) and transient (large signal) stability. It is based on an intrinsic parallel architecture which contains hybrid mixed-signal (analog and digital) circuits. For a given model, this architecture overcomes the speed of the numerical simulators by means of the so-called emulation approach. Indeed, the emulation speed does not depend on the power system size. This approach is nevertheless not competing against high-performance numerical simulators in term of accuracy and model complexity. It targets to complement the numerical simulators with the advantage of speed, portability, low cost and autonomous functioning. The proof of concept is a flexible and modular 96-node hardware platform. It is based on a reconfigurable array of power system buses called Field Programmable Power Network System (FPPNS). Details on this hardware are given. Two benchmark topologies with, respectively, 17 nodes and 57 nodes are provided. Comparisons with a digital simulator are done in terms of speed and accuracy. The calibration of the system is explained and different applications are proposed and discussed. The promising results of this hardware platform show that the design of a fully integrated solution containing hundreds of power system buses can be achieved in order to provide a low cost solution

Analog microelectronic emulation for dynamic power system computation

Power system dynamic simulators can be classified according to multiple criteria, including speed, precision, cost and modularity (topology, characteristics and model). Existing simulators are based on time-consuming numeric algorithms, which provide very precise results. But the evolution of the power grid constantly changes the requirements for simulators. In fact, power consumption is steadily increasing; therefore, the power system is always operating closer to its limits. Moreover, focus is put on decentralized and stochastic green energy sources, leading to a much more complex and less predictable power system. In order to guarantee security of supply under these conditions, real-time control and online security assessment are of the utmost importance. The main requirement for power system simulators in this context thus becomes the simulation time. The simulator has to be able to reproduce power system phenomena much faster than their real-time duration. An effective way to accelerate computation time of power system stability simulators is based on analog emulation of the power system grid. The idea is to avoid the heavy, time-consuming numerical matrix calculations of the grid by using an instantaneous analog Kirchhoff grid, with which computation becomes intrinsically parallel and the simulation time independent of the power system topology size. An overview of the power system computation history and the evolution of microelectronics highlights that the renaissance of dedicated analog computation is justified. Modern VLSI technologies can overcome the drawbacks which caused the disappearance of analog computation units in the 1960s. This work addresses therefore the development of a power system emulation approach from its theoretical principles to the behavioral design and the microelectronic implementation of a first demonstrator. The approach used in this research is called AC emulation approach and is based on a one-to-one mapping of components of the real power system (generator, load and transmission line) by emulating their behavior on a CMOS microelectronic integrated circuit (ASIC). The signals propagating on the emulated grid are the shrunk and downscaled current and voltage waves of the real power system. The uniqueness of this emulation approach is that frequency dependence of the signals is preserved. Therefore, the range of phenomena that can be emulated with an AC emulator depends only on the implemented models. Within the framework of this thesis, we restrict our developments to transient stability analysis, as our main focus is put on emulation speed. v We provide behavioral AC emulation models for the three main power system components. Thereby, special attention is paid to the generator model, which is shown to introduce a systematic error. This error is analyzed and reduced by model adaptation. Behavioral simulation results validate the developed models. Moreover, we suggest custom programmable analog building blocks for the implementation of the proposed behavioral models. During their design, application specific requirements, as well as imperfections, calibration, mismatch and process-variation aspects, are taken into account. In particular, the design of the tunable floating inductance used in all three AC emulation models is discussed in detail. In fact, major design challenges have to be addressed in order to achieve an inductance suitable for our application. Finally, a first AC emulation demonstrator is presented. A benchmark using a fixed two- machine topology has been implemented using a 0.35μm 3.3V CMOS technology. The characteristics of the emulated components (i.e. generators and transmission lines) are reprogrammable, allowing short circuits to be emulated at different distances from the generator. The emulated phenomena are shown to be 10′000 times faster than real time, therefore proving the high-speed capabilities of AC emulation

A mixed-signal platform dedicated to power system dynamic computation

has already been proven that analog emulation overcomes the speed limits of numerical simulators by means of a simple fixed-topology prototype. In order to enhance the modularity and the size of the emulated power system a dedicated platform based on a field programmable power network system (FPPNS) has been developed. This platform contains an application specific integrated circuit as main building block. Details on the designed hardware are given in this paper. Furthermore the emulator is validated comparing its emulation results with numerical reference simulations. The promising results of this platform show that the design of a fully integrated solution containing an array of 100 atoms can be started. © 2011 IEEE

A mixed-signal computer architecture and its application to power system problems

Radical changes are taking place in the landscape of modern power systems. This massive shift in the way the system is designed and operated has been termed the advent of the ``smart grid''. One of its implications is a strong market pull for faster power system analysis computing. This work is concerned in particular with transient simulation, which is one of the most demanding power system analyses. This refers to the imitation of the operation of the real-world system over time, for time scales that cover the majority of slow electromechanical transient phenomena. The general mathematical formulation of the simulation problem includes a set of non-linear differential algebraic equations (DAEs). In the algebraic part of this set, heavy linear algebra computations are included, which are related to the admittance matrix of the topology. These computations are a critical factor to the overall performance of a transient simulator. This work proposes the use of analog electronic computing as a means of exceeding the performance barriers of conventional digital computers for the linear algebra operations. Analog computing is integrated in the frame of a power system transient simulator yielding significant computational performance benefits to the latter. Two hybrid, analog and digital computers are presented. The first prototype has been implemented using reconfigurable hardware. In its core, analog computing is used for linear algebra operations, while pipelined digital resources on a field programmable gate array (FPGA) handle all remaining computations. The properties of the analog hardware are thoroughly examined, with special attention to accuracy and timing. The application of the platform to the transient analysis of power system dynamics showed a speedup of two orders of magnitude against conventional software solutions. The second prototype is proposed as a future conceptual architecture that would overcome the limitations of the already implemented hardware, while retaining its virtues. The design space of this future architecture has been thoroughly explored, with the help of a software emulator. For one possible suggested implementation, speedups of four orders of magnitude against software solvers have been observed for the linear algebra operations