11,528 research outputs found

    Metodologia Per la Caratterizzazione di amplificatori a basso rumore per UMTS

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    In questo lavoro si presenta una metodologia di progettazione elettronica a livello di sistema, affrontando il problema della caratterizzazione dello spazio di progetto dell' amplificatore a basso rumore costituente il primo stadio di un front end a conversione diretta per UMTS realizzato in tecnologia CMOS con lunghezza di canale .18u. La metodologia è sviluppata al fine di valutare in modo quantititativo le specifiche ottime di sistema per il front-end stesso e si basa sul concetto di Piattaforma Analogica, che prevede la costruzione di un modello di prestazioni per il blocco analogico basato su campionamento statistico di indici di prestazioni del blocco stesso, misurati tramite simulazione di dimensionamenti dei componenti attivi e passivi soddisfacenti un set di equazioni specifico della topologia circuitale. Gli indici di prestazioni vengono successivamente ulizzati per parametrizzare modelli comportamentali utilizzati nelle fasi di ottimizzazione a livello di sistema. Modelli comportamentali atti a rappresentare i sistemi RF sono stati pertanto studiati per ottimizzare la scelta delle metriche di prestazioni. L'ottimizzazione dei set di equazioni atti a selezionare le configurazione di interesse per il campionamento ha al tempo stesso richiesto l'approfondimento dei modelli di dispositivi attivi validi in tutte le regioni di funzionamento, e lo studio dettagliato della progettazione degli amplificatori a basso rumore basati su degenerazione induttiva. Inoltre, il problema della modellizzazione a livello di sistema degli effetti della comunicazione tra LNA e Mixer è stato affrontato proponendo e analizzando diverse soluzioni. Il lavoro ha permesso di condurre un'ottimizzazione del front-end UMTS, giungendo a specifiche ottime a livello di sistema per l'amplificatore stesso

    Accurate modeling techniques for power delivery

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    “Power delivery is essential in electronic systems to provide reliable power from voltage sources to load devices. Driven by the ambitious user demands and technology evolutions, the power delivery design is posed serious challenges. In this work, we focus on modeling two types of power delivery paths: the power distribution network (PDN) and the wireless power transfer (WPT) system. For the modeling of PDN, a novel pattern-based analytical method is proposed for PCB-level PDN impedance calculations, which constructs an equivalent circuit with one-to-one correspondences to the PCB’s physical structure. A practical modeling methodology is also introduced to optimize the PDN design. In addition, a topology-based behavior model is developed for the current-mode voltage regulator module (VRM). This model includes all the critical components in the power stage, the voltage control loop, and the current control loop of a VRM device. A novel method is also proposed to unify the modeling of the continuous and discontinuous conduction modes for transient load responses. Cascading the proposed VRM model with the PCB-level PDN model enables a combined PDN analysis, which is much needed for modern PDN designs. For the modeling of WPT system, a system-level model is developed for both efficiency and power loss of all the blocks in WPT systems. A rectifier characterization method is also proposed to obtain the accurate load impedance. This model is capable of deriving the power capabilities for both the fundamental and higher order harmonics. Based on the system model, a practical design methodology is introduced to simultaneously optimize multiple system parameters, which greatly accelerates the design process”--Abstract, page iv

    Time-domain optimization of amplifiers based on distributed genetic algorithms

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    Thesis presented in partial fulfillment of the requirements for the degree of Doctor of Philosophy in the subject of Electrical and Computer EngineeringThe work presented in this thesis addresses the task of circuit optimization, helping the designer facing the high performance and high efficiency circuits demands of the market and technology evolution. A novel framework is introduced, based on time-domain analysis, genetic algorithm optimization, and distributed processing. The time-domain optimization methodology is based on the step response of the amplifier. The main advantage of this new time-domain methodology is that, when a given settling-error is reached within the desired settling-time, it is automatically guaranteed that the amplifier has enough open-loop gain, AOL, output-swing (OS), slew-rate (SR), closed loop bandwidth and closed loop stability. Thus, this simplification of the circuit‟s evaluation helps the optimization process to converge faster. The method used to calculate the step response expression of the circuit is based on the inverse Laplace transform applied to the transfer function, symbolically, multiplied by 1/s (which represents the unity input step). Furthermore, may be applied to transfer functions of circuits with unlimited number of zeros/poles, without approximation in order to keep accuracy. Thus, complex circuit, with several design/optimization degrees of freedom can also be considered. The expression of the step response, from the proposed methodology, is based on the DC bias operating point of the devices of the circuit. For this, complex and accurate device models (e.g. BSIM3v3) are integrated. During the optimization process, the time-domain evaluation of the amplifier is used by the genetic algorithm, in the classification of the genetic individuals. The time-domain evaluator is integrated into the developed optimization platform, as independent library, coded using C programming language. The genetic algorithms have demonstrated to be a good approach for optimization since they are flexible and independent from the optimization-objective. Different levels of abstraction can be optimized either system level or circuit level. Optimization of any new block is basically carried-out by simply providing additional configuration files, e.g. chromosome format, in text format; and the circuit library where the fitness value of each individual of the genetic algorithm is computed. Distributed processing is also employed to address the increasing processing time demanded by the complex circuit analysis, and the accurate models of the circuit devices. The communication by remote processing nodes is based on Message Passing interface (MPI). It is demonstrated that the distributed processing reduced the optimization run-time by more than one order of magnitude. Platform assessment is carried by several examples of two-stage amplifiers, which have been optimized and successfully used, embedded, in larger systems, such as data converters. A dedicated example of an inverter-based self-biased two-stage amplifier has been designed, laid-out and fabricated as a stand-alone circuit and experimentally evaluated. The measured results are a direct demonstration of the effectiveness of the proposed time-domain optimization methodology.Portuguese Foundation for the Science and Technology (FCT

    Load Modeling and Evaluation of LEDs for Hardware Test Bed Application

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    The lighting industry was revolutionized with the emergence of LED lighting. Over the last 15 years, LED lighting device sales and utilization have grown immensely. The growth and popularity of LEDs is due to improved operation of the device when compared to previous lighting technologies. Efficient performance of the device is critical due to the growth of global energy consumption. As nonrenewable generation fuel is finite, utilities have begun the transition to renewable energy generation. Generation and distribution systems become inherently complex to comprehend and maintain with incorporation of emerging supply and load technologies. With the unprecedented growth of LED bulbs, there are concerns regarding the impact of their integration on power systems. In determination of the effects, which LED bulb adoption posed within the power grid, investigation of this device as a grid-load was pursued. This thesis reviews existing studies pertaining to LEDs and power grid load modeling methodologies. Load modeling aids in establishing a balance between energy generation and consumption, comprehensively characterizing relationships between electrical generation, transmission, distribution, and loads. Due to the complexities of large networked systems, device load models are constructed and aggregated in emulation of the interactive relationships throughout the power grid. This thesis includes a study of preestablished LED bulb ZIP load models and formulation of a component-based load model for improved characterization of a conventional LED lighting device. Load modeling was conducted with reference to the UTK HTB, for future integration and improved grid emulation. Factors, such as shape, size, illumination, and the power rating of popular LED bulbs is examined. Through investigation of typical LED bulb topologies, a model is formulated, in representation of device behavior as a load. The established load model’s characteristics are tested with comparison to physical device operation in a laboratory environment. The LED bulb component-based model is simulated under dynamic conditions in portrayal of device behavior under fault scenarios. An interactive interface is formulated for simulation of load behavior throughout grid level events. Detailed analysis of data and methods of implementation is provided, in characterization of the LED bulb’s load profile

    Design and Control of Power Converters 2020

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    In this book, nine papers focusing on different fields of power electronics are gathered, all of which are in line with the present trends in research and industry. Given the generality of the Special Issue, the covered topics range from electrothermal models and losses models in semiconductors and magnetics to converters used in high-power applications. In this last case, the papers address specific problems such as the distortion due to zero-current detection or fault investigation using the fast Fourier transform, all being focused on analyzing the topologies of high-power high-density applications, such as the dual active bridge or the H-bridge multilevel inverter. All the papers provide enough insight in the analyzed issues to be used as the starting point of any research. Experimental or simulation results are presented to validate and help with the understanding of the proposed ideas. To summarize, this book will help the reader to solve specific problems in industrial equipment or to increase their knowledge in specific fields
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